diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index 29402305bfd1..96469248535b 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -137,5 +137,12 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned BuiltinID,
             voidTy)
         .getResult();
   }
+  case X86::BI__rdtsc: {
+    mlir::Type intTy = cir::IntType::get(&getMLIRContext(), 64, false);
+    return builder
+        .create<cir::LLVMIntrinsicCallOp>(
+            getLoc(E->getExprLoc()), builder.getStringAttr("x86.rdtsc"), intTy)
+        .getResult();
+  }
   }
 }
diff --git a/clang/test/CIR/CodeGen/X86/builtins-x86.c b/clang/test/CIR/CodeGen/X86/builtins-x86.c
index caae16574d24..eeebec717bcd 100644
--- a/clang/test/CIR/CodeGen/X86/builtins-x86.c
+++ b/clang/test/CIR/CodeGen/X86/builtins-x86.c
@@ -46,4 +46,11 @@ void test_mm_sfence() {
   // LLVM: call void @llvm.x86.sse.sfence()
 }
 
+unsigned long long test_rdtsc() {
+  // CIR-LABEL: @test_rdtsc
+  // LLVM-LABEL: @test_rdtsc
+  return __rdtsc();
+  // CIR: {{%.*}} = cir.llvm.intrinsic "x86.rdtsc"  : () -> !u64i 
+  // LLVM: call i64 @llvm.x86.rdtsc
+}