diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
index 1af545d2e6ca..bfbe64048caf 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -2566,6 +2566,14 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
     argTypes.push_back(vTy);
     break;
   }
+  case NEON::BI__builtin_neon_vrnd64x_f32:
+  case NEON::BI__builtin_neon_vrnd64xq_f32:
+  case NEON::BI__builtin_neon_vrnd64x_f64:
+  case NEON::BI__builtin_neon_vrnd64xq_f64: {
+    intrincsName = "aarch64.neon.frint64x";
+    argTypes.push_back(vTy);
+    break;
+  }
   case NEON::BI__builtin_neon_vrnd32z_f32:
   case NEON::BI__builtin_neon_vrnd32zq_f32:
   case NEON::BI__builtin_neon_vrnd32z_f64:
@@ -4141,12 +4149,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
   case NEON::BI__builtin_neon_vrndh_f16: {
     llvm_unreachable("NEON::BI__builtin_neon_vrndh_f16 NYI");
   }
-  case NEON::BI__builtin_neon_vrnd64x_f32:
-  case NEON::BI__builtin_neon_vrnd64xq_f32:
-  case NEON::BI__builtin_neon_vrnd64x_f64:
-  case NEON::BI__builtin_neon_vrnd64xq_f64: {
-    llvm_unreachable("NEON::BI__builtin_neon_vrnd64xq_f64 NYI");
-  }
   case NEON::BI__builtin_neon_vrnd64z_f32:
   case NEON::BI__builtin_neon_vrnd64zq_f32:
   case NEON::BI__builtin_neon_vrnd64z_f64:
diff --git a/clang/test/CIR/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c b/clang/test/CIR/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
index 1ef035815351..b812580d3565 100644
--- a/clang/test/CIR/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
+++ b/clang/test/CIR/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
@@ -67,16 +67,30 @@ float32x4_t test_vrnd32zq_f32(float32x4_t a) {
 // CHECK-LABEL: test_vrnd64x_f32
 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint64x.v2f32(<2 x float> %a)
 // CHECK:  ret <2 x float> [[RND]]
-// float32x2_t test_vrnd64x_f32(float32x2_t a) {
-//   return vrnd64x_f32(a);
-// }
+float32x2_t test_vrnd64x_f32(float32x2_t a) {
+  return vrnd64x_f32(a);
+
+  // CIR-LABEL: vrnd64x_f32
+  // CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64x" {{.*}} : (!cir.vector<!cir.float x 2>) -> !cir.vector<!cir.float x 2>
+
+  // LLVM-LABEL: @test_vrnd64x_f32
+  // LLVM:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint64x.v2f32(<2 x float> %0)
+  // LLVM:  ret <2 x float> [[RND]]
+}
 
 // CHECK-LABEL: test_vrnd64xq_f32
 // CHECK:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint64x.v4f32(<4 x float> %a)
 // CHECK:  ret <4 x float> [[RND]]
-// float32x4_t test_vrnd64xq_f32(float32x4_t a) {
-//   return vrnd64xq_f32(a);
-// }
+float32x4_t test_vrnd64xq_f32(float32x4_t a) {
+  return vrnd64xq_f32(a);
+
+  // CIR-LABEL: vrnd64xq_f32
+  // CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64x" {{.*}} : (!cir.vector<!cir.float x 4>) -> !cir.vector<!cir.float x 4>
+
+  // LLVM-LABEL: @test_vrnd64xq_f32
+  // LLVM:  [[RND:%.*]] =  call <4 x float> @llvm.aarch64.neon.frint64x.v4f32(<4 x float> %0)
+  // LLVM:  ret <4 x float> [[RND]]
+}
 
 // CHECK-LABEL: test_vrnd64z_f32
 // CHECK:  [[RND:%.*]] =  call <2 x float> @llvm.aarch64.neon.frint64z.v2f32(<2 x float> %a)
@@ -140,16 +154,30 @@ float64x2_t test_vrnd32zq_f64(float64x2_t a) {
 // CHECK-LABEL: test_vrnd64x_f64
 // CHECK:  [[RND:%.*]] =  call <1 x double> @llvm.aarch64.neon.frint64x.v1f64(<1 x double> %a)
 // CHECK:  ret <1 x double> [[RND]]
-// float64x1_t test_vrnd64x_f64(float64x1_t a) {
-//   return vrnd64x_f64(a);
-// }
+float64x1_t test_vrnd64x_f64(float64x1_t a) {
+  return vrnd64x_f64(a);
+
+  // CIR-LABEL: vrnd64x_f64
+  // CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64x" {{.*}} : (!cir.vector<!cir.double x 1>) -> !cir.vector<!cir.double x 1>
+
+  // LLVM-LABEL: @test_vrnd64x_f64
+  // LLVM:  [[RND:%.*]] =  call <1 x double> @llvm.aarch64.neon.frint64x.v1f64(<1 x double> %0)
+  // LLVM:  ret <1 x double> [[RND]]
+}
 
 // CHECK-LABEL: test_vrnd64xq_f64
 // CHECK:  [[RND:%.*]] =  call <2 x double> @llvm.aarch64.neon.frint64x.v2f64(<2 x double> %a)
 // CHECK:  ret <2 x double> [[RND]]
-// float64x2_t test_vrnd64xq_f64(float64x2_t a) {
-//   return vrnd64xq_f64(a);
-// }
+float64x2_t test_vrnd64xq_f64(float64x2_t a) {
+  return vrnd64xq_f64(a);
+
+  // CIR-LABEL: vrnd64xq_f64
+  // CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64x" {{.*}} : (!cir.vector<!cir.double x 2>) -> !cir.vector<!cir.double x 2>
+
+  // LLVM-LABEL: @test_vrnd64xq_f64
+  // LLVM:  [[RND:%.*]] =  call <2 x double> @llvm.aarch64.neon.frint64x.v2f64(<2 x double> %0)
+  // LLVM:  ret <2 x double> [[RND]]
+}
 
 // CHECK-LABEL: test_vrnd64z_f64
 // CHECK:  [[RND:%.*]] =  call <1 x double> @llvm.aarch64.neon.frint64z.v1f64(<1 x double> %a)