diff --git a/sycl/include/CL/sycl/types.hpp b/sycl/include/CL/sycl/types.hpp
index 569cecae3624c..314dd9e62dd52 100644
--- a/sycl/include/CL/sycl/types.hpp
+++ b/sycl/include/CL/sycl/types.hpp
@@ -852,6 +852,32 @@ template <typename Type, int NumElements> class vec {
 #endif
   }
 
+  vec operator+() const {
+// Use __SYCL_DEVICE_ONLY__ macro because cast to OpenCL vector type is defined
+// by SYCL device compiler only.
+#ifdef __SYCL_DEVICE_ONLY__
+    return vec{+m_Data};
+#else
+    vec Ret;
+    for (size_t I = 0; I < NumElements; ++I)
+      Ret.setValue(I, +getValue(I));
+    return Ret;
+#endif
+  }
+
+  vec operator-() const {
+// Use __SYCL_DEVICE_ONLY__ macro because cast to OpenCL vector type is defined
+// by SYCL device compiler only.
+#ifdef __SYCL_DEVICE_ONLY__
+    return vec{-m_Data};
+#else
+    vec Ret;
+    for (size_t I = 0; I < NumElements; ++I)
+      Ret.setValue(I, -getValue(I));
+    return Ret;
+#endif
+  }
+
   // OP is: &&, ||
   // vec<RET, NumElements> operatorOP(const vec<DataT, NumElements> &Rhs) const;
   // vec<RET, NumElements> operatorOP(const DataT &Rhs) const;
@@ -1184,6 +1210,16 @@ class SwizzleOp {
     return !Tmp;
   }
 
+  vec_t operator+() {
+    vec_t Tmp = *this;
+    return +Tmp;
+  }
+
+  vec_t operator-() {
+    vec_t Tmp = *this;
+    return -Tmp;
+  }
+
   template <int IdxNum = getNumElements(),
             typename = EnableIfMultipleIndexes<IdxNum>>
   SwizzleOp &operator=(const vec<DataT, IdxNum> &Rhs) {
diff --git a/sycl/test/basic_tests/vec_op.cpp b/sycl/test/basic_tests/vec_op.cpp
new file mode 100644
index 0000000000000..55e1aee03fbb4
--- /dev/null
+++ b/sycl/test/basic_tests/vec_op.cpp
@@ -0,0 +1,47 @@
+// RUN: %clangxx -fsycl %s -o %t.out
+// RUN: env SYCL_DEVICE_TYPE=HOST %t.out
+// RUN: %CPU_RUN_PLACEHOLDER %t.out
+// RUN: %GPU_RUN_PLACEHOLDER %t.out
+// RUN: %ACC_RUN_PLACEHOLDER %t.out
+//==------------ vec_op.cpp - SYCL vec operations basic test ---------------==//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#define SYCL_SIMPLE_SWIZZLES
+
+#include <CL/sycl.hpp>
+
+#include <cassert>
+
+namespace s = cl::sycl;
+
+template <typename> class test;
+
+template <typename T> void testUnaryOp(const s::vec<T, 2> V) {
+  s::buffer<int, 1> Buf(s::range<1>(4));
+  s::queue Queue;
+  Queue.submit([&](s::handler &Cgh) {
+    auto Acc = Buf.get_access<s::access::mode::write>(Cgh);
+    Cgh.single_task<test<T>>([=]() {
+      Acc[0] = s::all(+V == s::vec<T, 2>{0.0, 1.0});
+      Acc[1] = s::all(-V == s::vec<T, 2>{-0.0, -1});
+      Acc[2] = s::all(+V.yx() == s::vec<T, 2>{1.0, 0.0});
+      Acc[3] = s::all(-V.yx() == s::vec<T, 2>{-1.0, -0.0});
+    });
+  });
+  auto Acc = Buf.get_access<s::access::mode::read>();
+  assert(Acc[0] == true);
+  assert(Acc[1] == true);
+  assert(Acc[2] == true);
+  assert(Acc[3] == true);
+}
+
+int main() {
+  testUnaryOp(s::int2{0, 1});
+  testUnaryOp(s::float2{0.f, 1.f});
+  testUnaryOp(s::half2{0.0, 1.0});
+  return 0;
+}