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| 1 | +; RUN: sycl-post-link -spec-const=rt --ir-output-only %s -S -o - \ |
| 2 | +; RUN: | FileCheck %s --implicit-check-not __sycl_getCompositeSpecConstantValue |
| 3 | +; |
| 4 | +; This test is intended to check that sycl-post-link tool is capable of handling |
| 5 | +; situations when the same composite specialization constants is used more than |
| 6 | +; once. Unlike multiple-composite-spec-const-usages.ll test, this is a real life |
| 7 | +; LLVM IR example |
| 8 | +; |
| 9 | +; CHECK-LABEL: @_ZTSN4test8kernel_tIfEE |
| 10 | +; CHECK: %[[#X1:]] = call float @_Z20__spirv_SpecConstantif(i32 0, float 0 |
| 11 | +; CHECK: %[[#Y1:]] = call float @_Z20__spirv_SpecConstantif(i32 1, float 0 |
| 12 | +; CHECK: call {{.*}} @_Z29__spirv_SpecConstantCompositeff(float %[[#X1]], float %[[#Y1]]), !SYCL_SPEC_CONST_SYM_ID ![[#ID:]] |
| 13 | +; CHECK-LABEL: @_ZTSN4test8kernel_tIiEE |
| 14 | +; CHECK: %[[#X2:]] = call float @_Z20__spirv_SpecConstantif(i32 0, float 0 |
| 15 | +; CHECK: %[[#Y2:]] = call float @_Z20__spirv_SpecConstantif(i32 1, float 0 |
| 16 | +; CHECK: call {{.*}} @_Z29__spirv_SpecConstantCompositeff(float %[[#X2]], float %[[#Y2]]), !SYCL_SPEC_CONST_SYM_ID ![[#ID]] |
| 17 | +; CHECK: ![[#ID]] = !{!"_ZTS11sc_kernel_t", i32 0, i32 1} |
| 18 | + |
| 19 | +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" |
| 20 | +target triple = "spir64-unknown-unknown-sycldevice" |
| 21 | + |
| 22 | +%"struct._ZTSN4test5pod_tE.test::pod_t" = type { float, float } |
| 23 | + |
| 24 | +$_ZTSN4test8kernel_tIfEE = comdat any |
| 25 | + |
| 26 | +$_ZTSN4test8kernel_tIiEE = comdat any |
| 27 | + |
| 28 | +@__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantIN4test5pod_tE11sc_kernel_tE3getIS5_EENSt9enable_ifIXaasr3std8is_classIT_EE5valuesr3std6is_podISA_EE5valueESA_E4typeEv = private unnamed_addr addrspace(1) constant [18 x i8] c"_ZTS11sc_kernel_t\00", align 1 |
| 29 | + |
| 30 | +; Function Attrs: convergent norecurse |
| 31 | +define weak_odr dso_local spir_kernel void @_ZTSN4test8kernel_tIfEE() local_unnamed_addr #0 comdat !kernel_arg_buffer_location !4 { |
| 32 | +entry: |
| 33 | + %ref.tmp.i = alloca %"struct._ZTSN4test5pod_tE.test::pod_t", align 4 |
| 34 | + %0 = bitcast %"struct._ZTSN4test5pod_tE.test::pod_t"* %ref.tmp.i to i8* |
| 35 | + call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0) #3 |
| 36 | + %1 = addrspacecast %"struct._ZTSN4test5pod_tE.test::pod_t"* %ref.tmp.i to %"struct._ZTSN4test5pod_tE.test::pod_t" addrspace(4)* |
| 37 | + call spir_func void @_Z36__sycl_getCompositeSpecConstantValueIN4test5pod_tEET_PKc(%"struct._ZTSN4test5pod_tE.test::pod_t" addrspace(4)* sret(%"struct._ZTSN4test5pod_tE.test::pod_t") align 4 %1, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([18 x i8], [18 x i8] addrspace(1)* @__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantIN4test5pod_tE11sc_kernel_tE3getIS5_EENSt9enable_ifIXaasr3std8is_classIT_EE5valuesr3std6is_podISA_EE5valueESA_E4typeEv, i64 0, i64 0) to i8 addrspace(4)*)) #4 |
| 38 | + call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0) #3 |
| 39 | + ret void |
| 40 | +} |
| 41 | + |
| 42 | +; Function Attrs: argmemonly nofree nosync nounwind willreturn |
| 43 | +declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1 |
| 44 | + |
| 45 | +; Function Attrs: argmemonly nofree nosync nounwind willreturn |
| 46 | +declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1 |
| 47 | + |
| 48 | +; Function Attrs: convergent |
| 49 | +declare dso_local spir_func void @_Z36__sycl_getCompositeSpecConstantValueIN4test5pod_tEET_PKc(%"struct._ZTSN4test5pod_tE.test::pod_t" addrspace(4)* sret(%"struct._ZTSN4test5pod_tE.test::pod_t") align 4, i8 addrspace(4)*) local_unnamed_addr #2 |
| 50 | + |
| 51 | +; Function Attrs: convergent norecurse |
| 52 | +define weak_odr dso_local spir_kernel void @_ZTSN4test8kernel_tIiEE() local_unnamed_addr #0 comdat !kernel_arg_buffer_location !4 { |
| 53 | +entry: |
| 54 | + %ref.tmp.i = alloca %"struct._ZTSN4test5pod_tE.test::pod_t", align 4 |
| 55 | + %0 = bitcast %"struct._ZTSN4test5pod_tE.test::pod_t"* %ref.tmp.i to i8* |
| 56 | + call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0) #3 |
| 57 | + %1 = addrspacecast %"struct._ZTSN4test5pod_tE.test::pod_t"* %ref.tmp.i to %"struct._ZTSN4test5pod_tE.test::pod_t" addrspace(4)* |
| 58 | + call spir_func void @_Z36__sycl_getCompositeSpecConstantValueIN4test5pod_tEET_PKc(%"struct._ZTSN4test5pod_tE.test::pod_t" addrspace(4)* sret(%"struct._ZTSN4test5pod_tE.test::pod_t") align 4 %1, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([18 x i8], [18 x i8] addrspace(1)* @__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantIN4test5pod_tE11sc_kernel_tE3getIS5_EENSt9enable_ifIXaasr3std8is_classIT_EE5valuesr3std6is_podISA_EE5valueESA_E4typeEv, i64 0, i64 0) to i8 addrspace(4)*)) #4 |
| 59 | + call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0) #3 |
| 60 | + ret void |
| 61 | +} |
| 62 | + |
| 63 | +attributes #0 = { convergent norecurse "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="repro-1.cpp" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" } |
| 64 | +attributes #1 = { argmemonly nofree nosync nounwind willreturn } |
| 65 | +attributes #2 = { convergent "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } |
| 66 | +attributes #3 = { nounwind } |
| 67 | +attributes #4 = { convergent } |
| 68 | + |
| 69 | +!llvm.module.flags = !{!0} |
| 70 | +!opencl.spir.version = !{!1} |
| 71 | +!spirv.Source = !{!2} |
| 72 | +!llvm.ident = !{!3} |
| 73 | + |
| 74 | +!0 = !{i32 1, !"wchar_size", i32 4} |
| 75 | +!1 = !{i32 1, i32 2} |
| 76 | +!2 = !{i32 4, i32 100000} |
| 77 | +!3 = !{!"clang version 12.0.0 (/data/github.com/intel/llvm/clang 9b7086f7cef079b80ac5e137394f8d77d5d49c3e)"} |
| 78 | +!4 = !{} |
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