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[NFC][MLIR][OpenMP] Modify tests to have allocas in the correct address space for AMDGPU
1 parent 367b91a commit a8b2c96

15 files changed

+105
-80
lines changed

‎mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-device.mlir

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
3+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
44
llvm.func @_QQmain() attributes {fir.bindc_name = "main"} {
55
%0 = llvm.mlir.addressof @_QFEi : !llvm.ptr
66
%1 = llvm.mlir.addressof @_QFEsp : !llvm.ptr
@@ -26,19 +26,21 @@ module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_devic
2626
// CHECK: define {{.*}} void @__omp_offloading_{{.*}}_{{.*}}__QQmain_l{{.*}}(ptr %[[DYN_PTR:.*]], ptr %[[ARG_BYREF:.*]], ptr %[[ARG_BYCOPY:.*]]) #{{[0-9]+}} {
2727

2828
// CHECK: entry:
29-
// CHECK: %[[ALLOCA_BYREF:.*]] = alloca ptr, align 8
30-
// CHECK: store ptr %[[ARG_BYREF]], ptr %[[ALLOCA_BYREF]], align 8
31-
// CHECK: %[[ALLOCA_BYCOPY:.*]] = alloca ptr, align 8
32-
// CHECK: store ptr %[[ARG_BYCOPY]], ptr %[[ALLOCA_BYCOPY]], align 8
29+
// CHECK: %[[ALLOCA_BYREF:.*]] = alloca ptr, align 8, addrspace(5)
30+
// CHECK: %[[ALLOCA_ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[ALLOCA_BYREF]] to ptr
31+
// CHECK: store ptr %[[ARG_BYREF]], ptr %[[ALLOCA_ASCAST]], align 8
32+
// CHECK: %[[ALLOCA_BYCOPY:.*]] = alloca ptr, align 8, addrspace(5)
33+
// CHECK: %[[ALLOCA_ASCAST2:.*]] = addrspacecast ptr addrspace(5) %[[ALLOCA_BYCOPY]] to ptr
34+
// CHECK: store ptr %[[ARG_BYCOPY]], ptr %[[ALLOCA_ASCAST2]], align 8
3335

3436
// CHECK: user_code.entry: ; preds = %entry
35-
// CHECK: %[[LOAD_BYREF:.*]] = load ptr, ptr %[[ALLOCA_BYREF]], align 8
37+
// CHECK: %[[LOAD_BYREF:.*]] = load ptr, ptr %[[ALLOCA_ASCAST]], align 8
3638
// CHECK: br label %outlined.body
3739

3840
// CHECK: outlined.body:
3941
// CHECK: br label %omp.target
4042

4143
// CHECK: omp.target:
42-
// CHECK: %[[VAL_LOAD_BYCOPY:.*]] = load i32, ptr %[[ALLOCA_BYCOPY]], align 4
44+
// CHECK: %[[VAL_LOAD_BYCOPY:.*]] = load i32, ptr %[[ALLOCA_ASCAST2]], align 4
4345
// CHECK: store i32 %[[VAL_LOAD_BYCOPY]], ptr %[[LOAD_BYREF]], align 4
4446
// CHECK: br label %omp.region.cont

‎mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -10,22 +10,24 @@
1010
// constant sized) allocations performs its task reasonably in these
1111
// scenarios.
1212

13-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
13+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
1414
llvm.func @_QQmain() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
1515
%1 = llvm.mlir.constant(1 : i64) : i64
1616
%2 = llvm.alloca %1 x !llvm.struct<(ptr)> : (i64) -> !llvm.ptr
1717
%3 = omp.map.info var_ptr(%2 : !llvm.ptr, !llvm.struct<(ptr)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
1818
omp.target map_entries(%3 -> %arg0 : !llvm.ptr) {
1919
%4 = llvm.mlir.constant(1 : i32) : i32
20-
%5 = llvm.alloca %4 x !llvm.struct<(ptr)> {alignment = 8 : i64} : (i32) -> !llvm.ptr
20+
%5 = llvm.alloca %4 x !llvm.struct<(ptr)> {alignment = 8 : i64} : (i32) -> !llvm.ptr<5>
21+
%ascast1 = llvm.addrspacecast %5 : !llvm.ptr<5> to !llvm.ptr
2122
%6 = llvm.mlir.constant(50 : i32) : i32
2223
%7 = llvm.mlir.constant(1 : i64) : i64
23-
%8 = llvm.alloca %7 x i32 : (i64) -> !llvm.ptr
24-
llvm.store %6, %8 : i32, !llvm.ptr
24+
%8 = llvm.alloca %7 x i32 : (i64) -> !llvm.ptr<5>
25+
%ascast2 = llvm.addrspacecast %8 : !llvm.ptr<5> to !llvm.ptr
26+
llvm.store %6, %ascast2 : i32, !llvm.ptr
2527
%9 = llvm.mlir.undef : !llvm.struct<(ptr)>
26-
%10 = llvm.insertvalue %8, %9[0] : !llvm.struct<(ptr)>
27-
llvm.store %10, %5 : !llvm.struct<(ptr)>, !llvm.ptr
28-
%88 = llvm.call @_ExternalCall(%arg0, %5) : (!llvm.ptr, !llvm.ptr) -> !llvm.struct<()>
28+
%10 = llvm.insertvalue %ascast2, %9[0] : !llvm.struct<(ptr)>
29+
llvm.store %10, %ascast1 : !llvm.struct<(ptr)>, !llvm.ptr
30+
%88 = llvm.call @_ExternalCall(%arg0, %ascast1) : (!llvm.ptr, !llvm.ptr) -> !llvm.struct<()>
2931
omp.terminator
3032
}
3133
llvm.return

‎mlir/test/Target/LLVMIR/omptarget-constant-indexing-device-region.mlir

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
3+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
44
llvm.func @_QQmain() attributes {bindc_name = "main"} {
55
%0 = llvm.mlir.addressof @_QFEsp : !llvm.ptr
66
%1 = llvm.mlir.constant(10 : index) : i64
@@ -32,9 +32,10 @@ module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_devic
3232

3333
// CHECK: define {{.*}} void @__omp_offloading_{{.*}}_{{.*}}__QQmain_{{.*}}(ptr %{{.*}}, ptr %[[ARG1:.*]]) #{{[0-9]+}} {
3434

35-
// CHECK: %[[ARG1_ALLOCA:.*]] = alloca ptr, align 8
36-
// CHECK: store ptr %[[ARG1]], ptr %[[ARG1_ALLOCA]], align 8
37-
// CHECK: %[[LOAD_ARG1_ALLOCA:.*]] = load ptr, ptr %[[ARG1_ALLOCA]], align 8
35+
// CHECK: %[[ARG1_ALLOCA:.*]] = alloca ptr, align 8, addrspace(5)
36+
// CHECK: %[[ARG1_ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[ARG1_ALLOCA]] to ptr
37+
// CHECK: store ptr %[[ARG1]], ptr %[[ARG1_ASCAST]], align 8
38+
// CHECK: %[[LOAD_ARG1_ALLOCA:.*]] = load ptr, ptr %[[ARG1_ASCAST]], align 8
3839
// CHECK: store i32 20, ptr %[[LOAD_ARG1_ALLOCA]], align 4
3940
// CHECK: %[[GEP_ARG1_ALLOCA:.*]] = getelementptr inbounds nuw i8, ptr %[[LOAD_ARG1_ALLOCA]], i64 16
4041
// CHECK: store i32 10, ptr %[[GEP_ARG1_ALLOCA]], align 4

‎mlir/test/Target/LLVMIR/omptarget-debug-var-1.mlir

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -26,20 +26,22 @@
2626
#var_x = #llvm.di_local_variable<scope = #sp,
2727
name = "x", file = #file, line = 12, type = #real_ty>
2828

29-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
29+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
3030
llvm.func @test() {
3131
%0 = llvm.mlir.constant(1 : i64) : i64
32-
%1 = llvm.alloca %0 x f32 : (i64) -> !llvm.ptr
33-
%4 = llvm.alloca %0 x i32 : (i64) -> !llvm.ptr
32+
%1 = llvm.alloca %0 x f32 : (i64) -> !llvm.ptr<5>
33+
%4 = llvm.alloca %0 x i32 : (i64) -> !llvm.ptr<5>
34+
%ascast = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
35+
%ascast2 = llvm.addrspacecast %4 : !llvm.ptr<5> to !llvm.ptr
3436
%6 = llvm.mlir.constant(9 : index) : i64
3537
%7 = llvm.mlir.constant(0 : index) : i64
3638
%8 = llvm.mlir.constant(1 : index) : i64
3739
%10 = llvm.mlir.constant(10 : index) : i64
3840
%11 = llvm.mlir.addressof @_QFEarr : !llvm.ptr
39-
%14 = omp.map.info var_ptr(%1 : !llvm.ptr, f32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
41+
%14 = omp.map.info var_ptr(%ascast : !llvm.ptr, f32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
4042
%15 = omp.map.bounds lower_bound(%7 : i64) upper_bound(%6 : i64) extent(%10 : i64) stride(%8 : i64) start_idx(%8 : i64)
4143
%16 = omp.map.info var_ptr(%11 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%15) -> !llvm.ptr
42-
%17 = omp.map.info var_ptr(%4 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr
44+
%17 = omp.map.info var_ptr(%ascast2 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr
4345
omp.target map_entries(%14 -> %arg0, %16 -> %arg1, %17 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
4446
llvm.intr.dbg.declare #var_x = %arg0 : !llvm.ptr
4547
llvm.intr.dbg.declare #var_arr = %arg1 : !llvm.ptr

‎mlir/test/Target/LLVMIR/omptarget-debug.mlir

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,11 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
3+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
44
llvm.func @_QQmain() {
55
%0 = llvm.mlir.constant(1 : i32) : i32
6-
%1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
7-
%9 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
6+
%1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr<5>
7+
%ascast = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
8+
%9 = omp.map.info var_ptr(%ascast : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
89
omp.target map_entries(%9 -> %arg0 : !llvm.ptr) {
910
%13 = llvm.mlir.constant(1 : i32) : i32
1011
llvm.store %13, %arg0 : i32, !llvm.ptr loc(#loc2)

‎mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,9 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
3333

3434
llvm.func @parallel_if(%arg0: !llvm.ptr {fir.bindc_name = "ifcond"}) {
3535
%0 = llvm.mlir.constant(1 : i64) : i64
36-
%1 = llvm.alloca %0 x i32 {bindc_name = "d"} : (i64) -> !llvm.ptr
37-
%2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
36+
%1 = llvm.alloca %0 x i32 {bindc_name = "d"} : (i64) -> !llvm.ptr<5>
37+
%cast = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
38+
%2 = omp.map.info var_ptr(%cast : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
3839
%3 = omp.map.info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "ifcond"}
3940
omp.target map_entries(%2 -> %arg1, %3 -> %arg2 : !llvm.ptr, !llvm.ptr) {
4041
%4 = llvm.mlir.constant(10 : i32) : i32

‎mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir

Lines changed: 26 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,28 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
3+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true} {
44
llvm.func @omp_target_region_() {
55
%0 = llvm.mlir.constant(20 : i32) : i32
66
%1 = llvm.mlir.constant(10 : i32) : i32
77
%2 = llvm.mlir.constant(1 : i64) : i64
8-
%3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr
8+
%3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr<5>
99
%4 = llvm.mlir.constant(1 : i64) : i64
10-
%5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr
10+
%5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr<5>
1111
%6 = llvm.mlir.constant(1 : i64) : i64
12-
%7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr
13-
llvm.store %1, %3 : i32, !llvm.ptr
14-
llvm.store %0, %5 : i32, !llvm.ptr
15-
%map1 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
16-
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
17-
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
12+
%7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr<5>
13+
%8 = llvm.addrspacecast %3 : !llvm.ptr<5> to !llvm.ptr
14+
%9 = llvm.addrspacecast %5 : !llvm.ptr<5> to !llvm.ptr
15+
%10 = llvm.addrspacecast %7 : !llvm.ptr<5> to !llvm.ptr
16+
llvm.store %1, %8 : i32, !llvm.ptr
17+
llvm.store %0, %9 : i32, !llvm.ptr
18+
%map1 = omp.map.info var_ptr(%8 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
19+
%map2 = omp.map.info var_ptr(%9 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
20+
%map3 = omp.map.info var_ptr(%10 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
1821
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
19-
%8 = llvm.load %arg0 : !llvm.ptr -> i32
20-
%9 = llvm.load %arg1 : !llvm.ptr -> i32
21-
%10 = llvm.add %8, %9 : i32
22-
llvm.store %10, %arg2 : i32, !llvm.ptr
22+
%11 = llvm.load %arg0 : !llvm.ptr -> i32
23+
%12 = llvm.load %arg1 : !llvm.ptr -> i32
24+
%13 = llvm.add %11, %12 : i32
25+
llvm.store %13, %arg2 : i32, !llvm.ptr
2326
omp.terminator
2427
}
2528
llvm.return
@@ -31,19 +34,22 @@ module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_devic
3134
// CHECK: @[[DYNA_ENV:.*]] = weak_odr protected global %struct.DynamicEnvironmentTy zeroinitializer
3235
// CHECK: @[[KERNEL_ENV:.*]] = weak_odr protected constant %struct.KernelEnvironmentTy { %struct.ConfigurationEnvironmentTy { i8 1, i8 1, i8 1, i32 1, i32 256, i32 -1, i32 -1, i32 0, i32 0 }, ptr @[[IDENT]], ptr @[[DYNA_ENV]] }
3336
// CHECK: define weak_odr protected amdgpu_kernel void @__omp_offloading_{{[^_]+}}_{{[^_]+}}_omp_target_region__l{{[0-9]+}}(ptr %[[DYN_PTR:.*]], ptr %[[ADDR_A:.*]], ptr %[[ADDR_B:.*]], ptr %[[ADDR_C:.*]])
34-
// CHECK: %[[TMP_A:.*]] = alloca ptr, align 8
35-
// CHECK: store ptr %[[ADDR_A]], ptr %[[TMP_A]], align 8
37+
// CHECK: %[[TMP_A:.*]] = alloca ptr, align 8, addrspace(5)
38+
// CHECK: %[[ASCAST_A:.*]] = addrspacecast ptr addrspace(5) %[[TMP_A]] to ptr
39+
// CHECK: store ptr %[[ADDR_A]], ptr %[[ASCAST_A]], align 8
3640
// CHECK: %[[TMP_B:.*]] = alloca ptr, align 8
37-
// CHECK: store ptr %[[ADDR_B]], ptr %[[TMP_B]], align 8
41+
// CHECK: %[[ASCAST_B:.*]] = addrspacecast ptr addrspace(5) %[[TMP_B]] to ptr
42+
// CHECK: store ptr %[[ADDR_B]], ptr %[[ASCAST_B]], align 8
3843
// CHECK: %[[TMP_C:.*]] = alloca ptr, align 8
39-
// CHECK: store ptr %[[ADDR_C]], ptr %[[TMP_C]], align 8
44+
// CHECK: %[[ASCAST_C:.*]] = addrspacecast ptr addrspace(5) %[[TMP_C]] to ptr
45+
// CHECK: store ptr %[[ADDR_C]], ptr %[[ASCAST_C]], align 8
4046
// CHECK: %[[INIT:.*]] = call i32 @__kmpc_target_init(ptr @[[KERNEL_ENV]], ptr %[[DYN_PTR]])
4147
// CHECK-NEXT: %[[CMP:.*]] = icmp eq i32 %[[INIT]], -1
4248
// CHECK-NEXT: br i1 %[[CMP]], label %[[LABEL_ENTRY:.*]], label %[[LABEL_EXIT:.*]]
4349
// CHECK: [[LABEL_ENTRY]]:
44-
// CHECK: %[[PTR_A:.*]] = load ptr, ptr %[[TMP_A]], align 8
45-
// CHECK: %[[PTR_B:.*]] = load ptr, ptr %[[TMP_B]], align 8
46-
// CHECK: %[[PTR_C:.*]] = load ptr, ptr %[[TMP_C]], align 8
50+
// CHECK: %[[PTR_A:.*]] = load ptr, ptr %[[ASCAST_A]], align 8
51+
// CHECK: %[[PTR_B:.*]] = load ptr, ptr %[[ASCAST_B]], align 8
52+
// CHECK: %[[PTR_C:.*]] = load ptr, ptr %[[ASCAST_C]], align 8
4753
// CHECK-NEXT: br label %[[LABEL_TARGET:.*]]
4854
// CHECK: [[LABEL_TARGET]]:
4955
// CHECK: %[[A:.*]] = load i32, ptr %[[PTR_A]], align 4

‎mlir/test/Target/LLVMIR/omptarget-target-inside-task.mlir

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,24 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true, omp.is_gpu = true} {
3+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true, omp.is_gpu = true} {
44
llvm.func @omp_target_region_() {
55
%0 = llvm.mlir.constant(20 : i32) : i32
66
%1 = llvm.mlir.constant(10 : i32) : i32
77
%2 = llvm.mlir.constant(1 : i64) : i64
8-
%3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr
8+
%3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr<5>
9+
%ascast = llvm.addrspacecast %3 : !llvm.ptr<5> to !llvm.ptr
910
%4 = llvm.mlir.constant(1 : i64) : i64
10-
%5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr
11+
%5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr<5>
12+
%ascast2 = llvm.addrspacecast %5 : !llvm.ptr<5> to !llvm.ptr
1113
%6 = llvm.mlir.constant(1 : i64) : i64
12-
%7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr
13-
llvm.store %1, %3 : i32, !llvm.ptr
14-
llvm.store %0, %5 : i32, !llvm.ptr
14+
%7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr<5>
15+
%ascast3 = llvm.addrspacecast %7 : !llvm.ptr<5> to !llvm.ptr
16+
llvm.store %1, %ascast : i32, !llvm.ptr
17+
llvm.store %0, %ascast2 : i32, !llvm.ptr
1518
omp.task {
16-
%map1 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
17-
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
18-
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
19+
%map1 = omp.map.info var_ptr(%ascast : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
20+
%map2 = omp.map.info var_ptr(%ascast2 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
21+
%map3 = omp.map.info var_ptr(%ascast3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
1922
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
2023
%8 = llvm.load %arg0 : !llvm.ptr -> i32
2124
%9 = llvm.load %arg1 : !llvm.ptr -> i32
@@ -36,5 +39,5 @@ module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_devic
3639
}
3740
}
3841

39-
// CHECK: define weak_odr protected amdgpu_kernel void @__omp_offloading_{{.*}}_{{.*}}_omp_target_region__l19
42+
// CHECK: define weak_odr protected amdgpu_kernel void @__omp_offloading_{{.*}}_{{.*}}_omp_target_region__l22
4043
// CHECK: ret void

‎mlir/test/Target/LLVMIR/omptarget-threadprivate-device-lowering.mlir

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
// omp.threadprivate does not crash on lowering during the OpenMP target device
55
// pass when used in conjunction with target code in the same module.
66

7-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true } {
7+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true } {
88
llvm.func @func() attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
99
%0 = llvm.mlir.addressof @_QFEpointer2 : !llvm.ptr
1010
%1 = omp.threadprivate %0 : !llvm.ptr -> !llvm.ptr
@@ -24,7 +24,8 @@ module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_devic
2424
}
2525

2626
// CHECK: define weak_odr protected amdgpu_kernel void @{{.*}}(ptr %{{.*}}, ptr %[[ARG1:.*]]) #{{[0-9]+}} {
27-
// CHECK: %[[ALLOCA:.*]] = alloca ptr, align 8
28-
// CHECK: store ptr %[[ARG1]], ptr %[[ALLOCA]], align 8
29-
// CHECK: %[[LOAD_ALLOCA:.*]] = load ptr, ptr %[[ALLOCA]], align 8
27+
// CHECK: %[[ALLOCA:.*]] = alloca ptr, align 8, addrspace(5)
28+
// CHECK: %[[ALLOCA_ASCAST:.*]] = addrspacecast ptr addrspace(5) %[[ALLOCA]] to ptr
29+
// CHECK: store ptr %[[ARG1]], ptr %[[ALLOCA_ASCAST]], align 8
30+
// CHECK: %[[LOAD_ALLOCA:.*]] = load ptr, ptr %[[ALLOCA_ASCAST]], align 8
3031
// CHECK: store i32 1, ptr %[[LOAD_ALLOCA]], align 4

‎mlir/test/Target/LLVMIR/openmp-target-generic-spmd.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,7 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
6060

6161
//--- device.mlir
6262

63-
module attributes {llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true, omp.is_gpu = true} {
63+
module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memory_space", 5 : ui32>>, llvm.target_triple = "amdgcn-amd-amdhsa", omp.is_target_device = true, omp.is_gpu = true} {
6464
llvm.func @main(%arg0 : !llvm.ptr) {
6565
%0 = omp.map.info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(to) capture(ByCopy) -> !llvm.ptr
6666
omp.target map_entries(%0 -> %ptr : !llvm.ptr) {

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