Disable 1, 8 and 16-bit int on thumbv7

agalakhov · agalakhov · commit f5a3a0d2dde5 · 2016-05-16T02:52:31.000+02:00
This is a workaround against LLVM Assertion. Looks like it'a a bug
since Cortex-M3 and Cortex-M4 do support unaligned access.
diff --git a/thumbv7em-none-eabi.json b/thumbv7em-none-eabi.json
@@ -1,7 +1,7 @@
 {
     "arch": "arm",
     "cpu": "cortex-m4",
-    "data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",
+    "data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",
     "disable-redzone": true,
     "executables": true,
     "llvm-target": "thumbv7em-none-eabi",
diff --git a/thumbv7m-none-eabi.json b/thumbv7m-none-eabi.json
@@ -1,7 +1,7 @@
 {
     "arch": "arm",
     "cpu": "cortex-m3",
-    "data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",
+    "data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",
     "disable-redzone": true,
     "executables": true,
     "llvm-target": "thumbv7m-none-eabi",

Original file line number	Diff line number	Diff line change
`@@ -1,7 +1,7 @@`
`1`	`1`	`{`
`2`	`2`	`"arch": "arm",`
`3`	`3`	`"cpu": "cortex-m4",`
`4`		`- "data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",`
	`4`	`+ "data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",`
`5`	`5`	`"disable-redzone": true,`
`6`	`6`	`"executables": true,`
`7`	`7`	`"llvm-target": "thumbv7em-none-eabi",`
Original file line number	Diff line number	Diff line change
`@@ -1,7 +1,7 @@`
`1`	`1`	`{`
`2`	`2`	`"arch": "arm",`
`3`	`3`	`"cpu": "cortex-m3",`
`4`		`- "data-layout": "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64",`
	`4`	`+ "data-layout": "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64",`
`5`	`5`	`"disable-redzone": true,`
`6`	`6`	`"executables": true,`
`7`	`7`	`"llvm-target": "thumbv7m-none-eabi",`