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cpu: support reading arm64 CPU feature registers
This allows to detect ARM64 CPU features on non-Linux systems. On Linux, this is used in case /proc/self/auxv cannot be read. Change-Id: I67d55e989f2beda0c05a97ca5e55781840a8e01c Reviewed-on: https://go-review.googlesource.com/c/sys/+/209478 Run-TryBot: Tobias Klauser <[email protected]> TryBot-Result: Gobot Gobot <[email protected]> Reviewed-by: Ian Lance Taylor <[email protected]>
1 parent 6d18c01 commit 85b82a3

11 files changed

+253
-50
lines changed

‎cpu/cpu_arm64.go

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// Copyright 2019 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package cpu
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import "runtime"
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const cacheLineSize = 64
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func init() {
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switch runtime.GOOS {
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case "darwin":
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// iOS does not seem to allow reading these registers
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case "android", "linux":
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doinit()
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default:
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readARM64Registers()
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}
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}
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func readARM64Registers() {
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Initialized = true
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// ID_AA64ISAR0_EL1
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isar0 := getisar0()
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switch extractBits(isar0, 4, 7) {
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case 1:
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ARM64.HasAES = true
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case 2:
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ARM64.HasAES = true
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ARM64.HasPMULL = true
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}
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switch extractBits(isar0, 8, 11) {
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case 1:
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ARM64.HasSHA1 = true
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}
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switch extractBits(isar0, 12, 15) {
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case 1:
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ARM64.HasSHA2 = true
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case 2:
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ARM64.HasSHA2 = true
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ARM64.HasSHA512 = true
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}
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switch extractBits(isar0, 16, 19) {
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case 1:
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ARM64.HasCRC32 = true
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}
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switch extractBits(isar0, 20, 23) {
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case 2:
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ARM64.HasATOMICS = true
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}
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switch extractBits(isar0, 28, 31) {
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case 1:
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ARM64.HasASIMDRDM = true
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}
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switch extractBits(isar0, 32, 35) {
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case 1:
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ARM64.HasSHA3 = true
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}
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switch extractBits(isar0, 36, 39) {
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case 1:
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ARM64.HasSM3 = true
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}
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switch extractBits(isar0, 40, 43) {
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case 1:
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ARM64.HasSM4 = true
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}
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switch extractBits(isar0, 44, 47) {
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case 1:
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ARM64.HasASIMDDP = true
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}
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// ID_AA64ISAR1_EL1
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isar1 := getisar1()
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switch extractBits(isar1, 0, 3) {
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case 1:
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ARM64.HasDCPOP = true
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}
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switch extractBits(isar1, 12, 15) {
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case 1:
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ARM64.HasJSCVT = true
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}
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switch extractBits(isar1, 16, 19) {
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case 1:
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ARM64.HasFCMA = true
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}
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switch extractBits(isar1, 20, 23) {
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case 1:
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ARM64.HasLRCPC = true
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}
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// ID_AA64PFR0_EL1
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pfr0 := getpfr0()
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switch extractBits(pfr0, 16, 19) {
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case 0:
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ARM64.HasFP = true
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case 1:
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ARM64.HasFP = true
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ARM64.HasFPHP = true
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}
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switch extractBits(pfr0, 20, 23) {
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case 0:
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ARM64.HasASIMD = true
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case 1:
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ARM64.HasASIMD = true
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ARM64.HasASIMDHP = true
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}
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switch extractBits(pfr0, 32, 35) {
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case 1:
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ARM64.HasSVE = true
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}
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}
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func extractBits(data uint64, start, end uint) uint {
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return (uint)(data>>start) & ((1 << (end - start + 1)) - 1)
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}

‎cpu/cpu_arm64.s

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// Copyright 2019 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build !gccgo
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#include "textflag.h"
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// func getisar0() uint64
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TEXT ·getisar0(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 0 into x0
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// mrs x0, ID_AA64ISAR0_EL1 = d5380600
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WORD $0xd5380600
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MOVD R0, ret+0(FP)
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RET
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// func getisar1() uint64
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TEXT ·getisar1(SB),NOSPLIT,$0-8
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// get Instruction Set Attributes 1 into x0
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// mrs x0, ID_AA64ISAR1_EL1 = d5380620
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WORD $0xd5380620
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MOVD R0, ret+0(FP)
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RET
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// func getpfr0() uint64
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TEXT ·getpfr0(SB),NOSPLIT,$0-8
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// get Processor Feature Register 0 into x0
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// mrs x0, ID_AA64PFR0_EL1 = d5380400
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WORD $0xd5380400
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MOVD R0, ret+0(FP)
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RET

‎cpu/cpu_gc_arm64.go

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// Copyright 2019 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build !gccgo
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package cpu
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func getisar0() uint64
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func getisar1() uint64
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func getpfr0() uint64

‎cpu/cpu_gccgo_arm64.go

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// Copyright 2019 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build gccgo
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package cpu
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func getisar0() uint64 { return 0 }
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func getisar1() uint64 { return 0 }
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func getpfr0() uint64 { return 0 }

‎cpu/cpu_gccgo.c renamed to ‎cpu/cpu_gccgo_x86.c

File renamed without changes.

‎cpu/cpu_gccgo.go renamed to ‎cpu/cpu_gccgo_x86.go

File renamed without changes.

‎cpu/cpu_linux.go

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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
44

5-
// +build !amd64,!amd64p32,!386
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// +build !386,!amd64,!amd64p32,!arm64
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77
package cpu
88

9-
import (
10-
"io/ioutil"
11-
)
12-
13-
const (
14-
_AT_HWCAP = 16
15-
_AT_HWCAP2 = 26
16-
17-
procAuxv = "/proc/self/auxv"
18-
19-
uintSize = int(32 << (^uint(0) >> 63))
20-
)
21-
22-
// For those platforms don't have a 'cpuid' equivalent we use HWCAP/HWCAP2
23-
// These are initialized in cpu_$GOARCH.go
24-
// and should not be changed after they are initialized.
25-
var hwCap uint
26-
var hwCap2 uint
27-
289
func init() {
29-
buf, err := ioutil.ReadFile(procAuxv)
30-
if err != nil {
31-
// e.g. on android /proc/self/auxv is not accessible, so silently
32-
// ignore the error and leave Initialized = false
10+
if err := readHWCAP(); err != nil {
3311
return
3412
}
35-
36-
bo := hostByteOrder()
37-
for len(buf) >= 2*(uintSize/8) {
38-
var tag, val uint
39-
switch uintSize {
40-
case 32:
41-
tag = uint(bo.Uint32(buf[0:]))
42-
val = uint(bo.Uint32(buf[4:]))
43-
buf = buf[8:]
44-
case 64:
45-
tag = uint(bo.Uint64(buf[0:]))
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val = uint(bo.Uint64(buf[8:]))
47-
buf = buf[16:]
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}
49-
switch tag {
50-
case _AT_HWCAP:
51-
hwCap = val
52-
case _AT_HWCAP2:
53-
hwCap2 = val
54-
}
55-
}
5613
doinit()
57-
5814
Initialized = true
5915
}

‎cpu/cpu_linux_arm64.go

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@@ -4,8 +4,6 @@
44

55
package cpu
66

7-
const cacheLineSize = 64
8-
97
// HWCAP/HWCAP2 bits. These are exposed by Linux.
108
const (
119
hwcap_FP = 1 << 0
@@ -35,6 +33,12 @@ const (
3533
)
3634

3735
func doinit() {
36+
if err := readHWCAP(); err != nil {
37+
// failed to read /proc/self/auxv, try reading registers directly
38+
readARM64Registers()
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return
40+
}
41+
3842
// HWCAP feature bits
3943
ARM64.HasFP = isSet(hwCap, hwcap_FP)
4044
ARM64.HasASIMD = isSet(hwCap, hwcap_ASIMD)

‎cpu/cpu_other_arm64.go

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@@ -6,4 +6,4 @@
66

77
package cpu
88

9-
const cacheLineSize = 64
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func doinit() {}

‎cpu/cpu_test.go

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@@ -31,7 +31,7 @@ func TestAVX2hasAVX(t *testing.T) {
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}
3232

3333
func TestARM64minimalFeatures(t *testing.T) {
34-
if runtime.GOARCH != "arm64" || runtime.GOOS != "linux" {
34+
if runtime.GOARCH != "arm64" || runtime.GOOS == "darwin" {
3535
return
3636
}
3737
if !cpu.ARM64.HasASIMD {

‎cpu/hwcap_linux.go

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// Copyright 2019 The Go Authors. All rights reserved.
2+
// Use of this source code is governed by a BSD-style
3+
// license that can be found in the LICENSE file.
4+
5+
package cpu
6+
7+
import (
8+
"io/ioutil"
9+
)
10+
11+
const (
12+
_AT_HWCAP = 16
13+
_AT_HWCAP2 = 26
14+
15+
procAuxv = "/proc/self/auxv"
16+
17+
uintSize = int(32 << (^uint(0) >> 63))
18+
)
19+
20+
// For those platforms don't have a 'cpuid' equivalent we use HWCAP/HWCAP2
21+
// These are initialized in cpu_$GOARCH.go
22+
// and should not be changed after they are initialized.
23+
var hwCap uint
24+
var hwCap2 uint
25+
26+
func readHWCAP() error {
27+
buf, err := ioutil.ReadFile(procAuxv)
28+
if err != nil {
29+
// e.g. on android /proc/self/auxv is not accessible, so silently
30+
// ignore the error and leave Initialized = false. On some
31+
// architectures (e.g. arm64) doinit() implements a fallback
32+
// readout and will set Initialized = true again.
33+
return err
34+
}
35+
bo := hostByteOrder()
36+
for len(buf) >= 2*(uintSize/8) {
37+
var tag, val uint
38+
switch uintSize {
39+
case 32:
40+
tag = uint(bo.Uint32(buf[0:]))
41+
val = uint(bo.Uint32(buf[4:]))
42+
buf = buf[8:]
43+
case 64:
44+
tag = uint(bo.Uint64(buf[0:]))
45+
val = uint(bo.Uint64(buf[8:]))
46+
buf = buf[16:]
47+
}
48+
switch tag {
49+
case _AT_HWCAP:
50+
hwCap = val
51+
case _AT_HWCAP2:
52+
hwCap2 = val
53+
}
54+
}
55+
return nil
56+
}

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