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[release-branch.go1.19] cmd/compile: use correct type for byteswaps on multi-byte stores
Use the type of the store for the byteswap, not the type of the store's value argument. Normally when we're storing a 16-bit value, the value being stored is also typed as 16 bits. But sometimes it is typed as something smaller, usually because it is the result of an upcast from a smaller value, and that upcast needs no instructions. If the type of the store's arg is thinner than the type being stored, and the byteswap'd value uses that thinner type, and the byteswap'd value needs to be spilled & restored, that spill/restore happens using the thinner type, which causes us to lose some of the top bits of the value. Fixes #59373 Change-Id: If6ce1e8a76f18bf8e9d79871b6caa438bc3cce4d Reviewed-on: https://go-review.googlesource.com/c/go/+/481395 Reviewed-by: David Chase <[email protected]> Reviewed-by: Cherry Mui <[email protected]> Run-TryBot: Keith Randall <[email protected]> TryBot-Result: Gopher Robot <[email protected]> Reviewed-on: https://go-review.googlesource.com/c/go/+/483177 Auto-Submit: Dmitri Shuralyov <[email protected]>
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‎src/cmd/compile/internal/ssa/gen/AMD64.rules

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1855,13 +1855,13 @@
18551855
x0:(MOVBstore [i-1] {s} p (SHRWconst [8] w) mem))
18561856
&& x0.Uses == 1
18571857
&& clobber(x0)
1858-
=> (MOVWstore [i-1] {s} p (ROLWconst <w.Type> [8] w) mem)
1858+
=> (MOVWstore [i-1] {s} p (ROLWconst <typ.UInt16> [8] w) mem)
18591859
(MOVBstore [i] {s} p1 w
18601860
x0:(MOVBstore [i] {s} p0 (SHRWconst [8] w) mem))
18611861
&& x0.Uses == 1
18621862
&& sequentialAddresses(p0, p1, 1)
18631863
&& clobber(x0)
1864-
=> (MOVWstore [i] {s} p0 (ROLWconst <w.Type> [8] w) mem)
1864+
=> (MOVWstore [i] {s} p0 (ROLWconst <typ.UInt16> [8] w) mem)
18651865

18661866
// Combine stores + shifts into bswap and larger (unaligned) stores
18671867
(MOVBstore [i] {s} p w
@@ -1872,7 +1872,7 @@
18721872
&& x1.Uses == 1
18731873
&& x2.Uses == 1
18741874
&& clobber(x0, x1, x2)
1875-
=> (MOVLstore [i-3] {s} p (BSWAPL <w.Type> w) mem)
1875+
=> (MOVLstore [i-3] {s} p (BSWAPL <typ.UInt32> w) mem)
18761876
(MOVBstore [i] {s} p3 w
18771877
x2:(MOVBstore [i] {s} p2 (SHRLconst [8] w)
18781878
x1:(MOVBstore [i] {s} p1 (SHRLconst [16] w)
@@ -1884,7 +1884,7 @@
18841884
&& sequentialAddresses(p1, p2, 1)
18851885
&& sequentialAddresses(p2, p3, 1)
18861886
&& clobber(x0, x1, x2)
1887-
=> (MOVLstore [i] {s} p0 (BSWAPL <w.Type> w) mem)
1887+
=> (MOVLstore [i] {s} p0 (BSWAPL <typ.UInt32> w) mem)
18881888

18891889
(MOVBstore [i] {s} p w
18901890
x6:(MOVBstore [i-1] {s} p (SHRQconst [8] w)
@@ -1902,7 +1902,7 @@
19021902
&& x5.Uses == 1
19031903
&& x6.Uses == 1
19041904
&& clobber(x0, x1, x2, x3, x4, x5, x6)
1905-
=> (MOVQstore [i-7] {s} p (BSWAPQ <w.Type> w) mem)
1905+
=> (MOVQstore [i-7] {s} p (BSWAPQ <typ.UInt64> w) mem)
19061906
(MOVBstore [i] {s} p7 w
19071907
x6:(MOVBstore [i] {s} p6 (SHRQconst [8] w)
19081908
x5:(MOVBstore [i] {s} p5 (SHRQconst [16] w)
@@ -1926,7 +1926,7 @@
19261926
&& sequentialAddresses(p5, p6, 1)
19271927
&& sequentialAddresses(p6, p7, 1)
19281928
&& clobber(x0, x1, x2, x3, x4, x5, x6)
1929-
=> (MOVQstore [i] {s} p0 (BSWAPQ <w.Type> w) mem)
1929+
=> (MOVQstore [i] {s} p0 (BSWAPQ <typ.UInt64> w) mem)
19301930

19311931
// Combine constant stores into larger (unaligned) stores.
19321932
(MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem))

‎src/cmd/compile/internal/ssa/gen/ARM64.rules

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -2747,7 +2747,7 @@
27472747
&& x5.Uses == 1
27482748
&& x6.Uses == 1
27492749
&& clobber(x0, x1, x2, x3, x4, x5, x6)
2750-
=> (MOVDstore [i-7] {s} ptr (REV <w.Type> w) mem)
2750+
=> (MOVDstore [i-7] {s} ptr (REV <typ.UInt64> w) mem)
27512751
(MOVBstore [7] {s} p w
27522752
x0:(MOVBstore [6] {s} p (SRLconst [8] w)
27532753
x1:(MOVBstore [5] {s} p (SRLconst [16] w)
@@ -2767,7 +2767,7 @@
27672767
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27682768
&& isSamePtr(p1, p)
27692769
&& clobber(x0, x1, x2, x3, x4, x5, x6)
2770-
=> (MOVDstoreidx ptr0 idx0 (REV <w.Type> w) mem)
2770+
=> (MOVDstoreidx ptr0 idx0 (REV <typ.UInt64> w) mem)
27712771
(MOVBstore [i] {s} ptr w
27722772
x0:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w)
27732773
x1:(MOVBstore [i-2] {s} ptr (UBFX [armBFAuxInt(16, 16)] w)
@@ -2776,7 +2776,7 @@
27762776
&& x1.Uses == 1
27772777
&& x2.Uses == 1
27782778
&& clobber(x0, x1, x2)
2779-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2779+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
27802780
(MOVBstore [3] {s} p w
27812781
x0:(MOVBstore [2] {s} p (UBFX [armBFAuxInt(8, 24)] w)
27822782
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2788,7 +2788,7 @@
27882788
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27892789
&& isSamePtr(p1, p)
27902790
&& clobber(x0, x1, x2)
2791-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2791+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
27922792
(MOVBstoreidx ptr (ADDconst [3] idx) w
27932793
x0:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(8, 24)] w)
27942794
x1:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2797,7 +2797,7 @@
27972797
&& x1.Uses == 1
27982798
&& x2.Uses == 1
27992799
&& clobber(x0, x1, x2)
2800-
=> (MOVWstoreidx ptr idx (REVW <w.Type> w) mem)
2800+
=> (MOVWstoreidx ptr idx (REVW <typ.UInt32> w) mem)
28012801
(MOVBstoreidx ptr idx w
28022802
x0:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 24)] w)
28032803
x1:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2815,7 +2815,7 @@
28152815
&& x1.Uses == 1
28162816
&& x2.Uses == 1
28172817
&& clobber(x0, x1, x2)
2818-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2818+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
28192819
(MOVBstore [3] {s} p w
28202820
x0:(MOVBstore [2] {s} p (SRLconst [8] (MOVDreg w))
28212821
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] (MOVDreg w))
@@ -2827,7 +2827,7 @@
28272827
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28282828
&& isSamePtr(p1, p)
28292829
&& clobber(x0, x1, x2)
2830-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2830+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
28312831
(MOVBstore [i] {s} ptr w
28322832
x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w)
28332833
x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w)
@@ -2836,7 +2836,7 @@
28362836
&& x1.Uses == 1
28372837
&& x2.Uses == 1
28382838
&& clobber(x0, x1, x2)
2839-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2839+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
28402840
(MOVBstore [3] {s} p w
28412841
x0:(MOVBstore [2] {s} p (SRLconst [8] w)
28422842
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] w)
@@ -2848,55 +2848,55 @@
28482848
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28492849
&& isSamePtr(p1, p)
28502850
&& clobber(x0, x1, x2)
2851-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2851+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
28522852
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) mem))
28532853
&& x.Uses == 1
28542854
&& clobber(x)
2855-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2855+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28562856
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] w) mem))
28572857
&& x.Uses == 1
28582858
&& s == nil
28592859
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28602860
&& clobber(x)
2861-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2861+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28622862
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 8)] w) mem))
28632863
&& x.Uses == 1
28642864
&& clobber(x)
2865-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2865+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28662866
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 8)] w) mem))
28672867
&& x.Uses == 1
28682868
&& s == nil
28692869
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28702870
&& clobber(x)
2871-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2871+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28722872
(MOVBstoreidx ptr (ADDconst [1] idx) w x:(MOVBstoreidx ptr idx (UBFX [armBFAuxInt(8, 8)] w) mem))
28732873
&& x.Uses == 1
28742874
&& clobber(x)
2875-
=> (MOVHstoreidx ptr idx (REV16W <w.Type> w) mem)
2875+
=> (MOVHstoreidx ptr idx (REV16W <typ.UInt16> w) mem)
28762876
(MOVBstoreidx ptr idx w x:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 8)] w) mem))
28772877
&& x.Uses == 1
28782878
&& clobber(x)
28792879
=> (MOVHstoreidx ptr idx w mem)
28802880
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
28812881
&& x.Uses == 1
28822882
&& clobber(x)
2883-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2883+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28842884
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] (MOVDreg w)) mem))
28852885
&& x.Uses == 1
28862886
&& s == nil
28872887
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28882888
&& clobber(x)
2889-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2889+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28902890
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w) mem))
28912891
&& x.Uses == 1
28922892
&& clobber(x)
2893-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2893+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28942894
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 24)] w) mem))
28952895
&& x.Uses == 1
28962896
&& s == nil
28972897
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28982898
&& clobber(x)
2899-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2899+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
29002900

29012901
// FP simplification
29022902
(FNEGS (FMULS x y)) => (FNMULS x y)

‎src/cmd/compile/internal/ssa/rewriteAMD64.go

Lines changed: 12 additions & 12 deletions
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