Skip to content

Commit c8ab8c1

Browse files
benshi001cherrymui
benshi001
authored and
cherrymui
committed
cmd/internal/obj/arm: fix constant decomposition
There are two issues in constant decomposition. 1. A typo in "func immrot2s" blocks "case 107" of []optab be triggered. 2. Though "ADD $0xffff, R0, R0" is decomposed to "ADD $0xff00, R0, R0" and "ADD $0x00ff, R0, R0" as expected, "ADD $0xffff, R0" still uses the constant pool, which should be the same as "ADD $0xffff, R0, R0". This patch fixes them and adds more instruction encoding tests. fix #20516 Change-Id: Icd7bdfa1946b29db15580dcb429111266f1384c6 Reviewed-on: https://go-review.googlesource.com/44335 Run-TryBot: Cherry Zhang <[email protected]> TryBot-Result: Gobot Gobot <[email protected]> Reviewed-by: Cherry Zhang <[email protected]>
1 parent 3cc2da6 commit c8ab8c1

File tree

2 files changed

+127
-1
lines changed
  • src/cmd

2 files changed

+127
-1
lines changed

‎src/cmd/asm/internal/asm/testdata/arm.s

Lines changed: 117 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -963,9 +963,13 @@ jmp_label_3:
963963

964964
// MUL
965965
MUL R2, R3, R4 // 930204e0
966+
MUL R2, R4 // 920404e0
966967
MUL.S R2, R3, R4 // 930214e0
968+
MUL.S R2, R4 // 920414e0
967969
MULU R5, R6, R7 // 960507e0
970+
MULU R5, R7 // 950707e0
968971
MULU.S R5, R6, R7 // 960517e0
972+
MULU.S R5, R7 // 950717e0
969973
MULLU R1, R2, (R4, R3) // 923184e0
970974
MULLU.S R1, R2, (R4, R3) // 923194e0
971975
MULL R1, R2, (R4, R3) // 9231c4e0
@@ -1003,6 +1007,119 @@ jmp_label_3:
10031007
SWI $65535 // ffff00ef
10041008
SWI // 000000ef
10051009

1010+
// synthetic arithmatic
1011+
ADD $0xffffffaa, R2, R3 // ADD $4294967210, R2, R3 // 55b0e0e30b3082e0
1012+
ADD $0xffffff55, R5 // ADD $4294967125, R5 // aab0e0e30b5085e0
1013+
ADD.S $0xffffffab, R2, R3 // ADD.S $4294967211, R2, R3 // 54b0e0e30b3092e0
1014+
ADD.S $0xffffff54, R5 // ADD.S $4294967124, R5 // abb0e0e30b5095e0
1015+
ADC $0xffffffac, R2, R3 // ADC $4294967212, R2, R3 // 53b0e0e30b30a2e0
1016+
ADC $0xffffff53, R5 // ADC $4294967123, R5 // acb0e0e30b50a5e0
1017+
ADC.S $0xffffffad, R2, R3 // ADC.S $4294967213, R2, R3 // 52b0e0e30b30b2e0
1018+
ADC.S $0xffffff52, R5 // ADC.S $4294967122, R5 // adb0e0e30b50b5e0
1019+
SUB $0xffffffae, R2, R3 // SUB $4294967214, R2, R3 // 51b0e0e30b3042e0
1020+
SUB $0xffffff51, R5 // SUB $4294967121, R5 // aeb0e0e30b5045e0
1021+
SUB.S $0xffffffaf, R2, R3 // SUB.S $4294967215, R2, R3 // 50b0e0e30b3052e0
1022+
SUB.S $0xffffff50, R5 // SUB.S $4294967120, R5 // afb0e0e30b5055e0
1023+
SBC $0xffffffb0, R2, R3 // SBC $4294967216, R2, R3 // 4fb0e0e30b30c2e0
1024+
SBC $0xffffff4f, R5 // SBC $4294967119, R5 // b0b0e0e30b50c5e0
1025+
SBC.S $0xffffffb1, R2, R3 // SBC.S $4294967217, R2, R3 // 4eb0e0e30b30d2e0
1026+
SBC.S $0xffffff4e, R5 // SBC.S $4294967118, R5 // b1b0e0e30b50d5e0
1027+
RSB $0xffffffb2, R2, R3 // RSB $4294967218, R2, R3 // 4db0e0e30b3062e0
1028+
RSB $0xffffff4d, R5 // RSB $4294967117, R5 // b2b0e0e30b5065e0
1029+
RSB.S $0xffffffb3, R2, R3 // RSB.S $4294967219, R2, R3 // 4cb0e0e30b3072e0
1030+
RSB.S $0xffffff4c, R5 // RSB.S $4294967116, R5 // b3b0e0e30b5075e0
1031+
RSC $0xffffffb4, R2, R3 // RSC $4294967220, R2, R3 // 4bb0e0e30b30e2e0
1032+
RSC $0xffffff4b, R5 // RSC $4294967115, R5 // b4b0e0e30b50e5e0
1033+
RSC.S $0xffffffb5, R2, R3 // RSC.S $4294967221, R2, R3 // 4ab0e0e30b30f2e0
1034+
RSC.S $0xffffff4a, R5 // RSC.S $4294967114, R5 // b5b0e0e30b50f5e0
1035+
AND $0xffffffaa, R2, R3 // AND $4294967210, R2, R3 // 55b0e0e30b3002e0
1036+
AND $0xffffff55, R5 // AND $4294967125, R5 // aab0e0e30b5005e0
1037+
AND.S $0xffffffab, R2, R3 // AND.S $4294967211, R2, R3 // 54b0e0e30b3012e0
1038+
AND.S $0xffffff54, R5 // AND.S $4294967124, R5 // abb0e0e30b5015e0
1039+
ORR $0xffffffaa, R2, R3 // ORR $4294967210, R2, R3 // 55b0e0e30b3082e1
1040+
ORR $0xffffff55, R5 // ORR $4294967125, R5 // aab0e0e30b5085e1
1041+
ORR.S $0xffffffab, R2, R3 // ORR.S $4294967211, R2, R3 // 54b0e0e30b3092e1
1042+
ORR.S $0xffffff54, R5 // ORR.S $4294967124, R5 // abb0e0e30b5095e1
1043+
EOR $0xffffffaa, R2, R3 // EOR $4294967210, R2, R3 // 55b0e0e30b3022e0
1044+
EOR $0xffffff55, R5 // EOR $4294967125, R5 // aab0e0e30b5025e0
1045+
EOR.S $0xffffffab, R2, R3 // EOR.S $4294967211, R2, R3 // 54b0e0e30b3032e0
1046+
EOR.S $0xffffff54, R5 // EOR.S $4294967124, R5 // abb0e0e30b5035e0
1047+
BIC $0xffffffaa, R2, R3 // BIC $4294967210, R2, R3 // 55b0e0e30b30c2e1
1048+
BIC $0xffffff55, R5 // BIC $4294967125, R5 // aab0e0e30b50c5e1
1049+
BIC.S $0xffffffab, R2, R3 // BIC.S $4294967211, R2, R3 // 54b0e0e30b30d2e1
1050+
BIC.S $0xffffff54, R5 // BIC.S $4294967124, R5 // abb0e0e30b50d5e1
1051+
CMP $0xffffffab, R2 // CMP $4294967211, R2 // 54b0e0e30b0052e1
1052+
CMN $0xffffffac, R3 // CMN $4294967212, R3 // 53b0e0e30b0073e1
1053+
TST $0xffffffad, R4 // TST $4294967213, R4 // 52b0e0e30b0014e1
1054+
TEQ $0xffffffae, R5 // TEQ $4294967214, R5 // 51b0e0e30b0035e1
1055+
1056+
// immediate decomposition
1057+
ADD $0xff0000ff, R0, R1 // ADD $4278190335, R0, R1 // ff1080e2ff1481e2
1058+
EOR $0xff0000ff, R0, R1 // EOR $4278190335, R0, R1 // ff1020e2ff1421e2
1059+
ORR $0xff0000ff, R0, R1 // ORR $4278190335, R0, R1 // ff1080e3ff1481e3
1060+
SUB $0xff0000ff, R0, R1 // SUB $4278190335, R0, R1 // ff1040e2ff1441e2
1061+
BIC $0xff0000ff, R0, R1 // BIC $4278190335, R0, R1 // ff10c0e3ff14c1e3
1062+
RSB $0xff0000ff, R0, R1 // RSB $4278190335, R0, R1 // ff1060e2ff1481e2
1063+
ADC $0xff0000ff, R0, R1 // ADC $4278190335, R0, R1 // ff10a0e2ff1481e2
1064+
SBC $0xff0000ff, R0, R1 // SBC $4278190335, R0, R1 // ff10c0e2ff1441e2
1065+
RSC $0xff0000ff, R0, R1 // RSC $4278190335, R0, R1 // ff10e0e2ff1481e2
1066+
ADD $0x000fffff, R0, R1 // ADD $1048575, R0, R1 // 011680e2011041e2
1067+
ADC $0x000fffff, R0, R1 // ADC $1048575, R0, R1 // 0116a0e2011041e2
1068+
SUB $0x000fffff, R0, R1 // SUB $1048575, R0, R1 // 011640e2011081e2
1069+
SBC $0x000fffff, R0, R1 // SBC $1048575, R0, R1 // 0116c0e2011081e2
1070+
RSB $0x000fffff, R0, R1 // RSB $1048575, R0, R1 // 011660e2011041e2
1071+
RSC $0x000fffff, R0, R1 // RSC $1048575, R0, R1 // 0116e0e2011041e2
1072+
ADD $0xff0000ff, R1 // ADD $4278190335, R1 // ff1081e2ff1481e2
1073+
EOR $0xff0000ff, R1 // EOR $4278190335, R1 // ff1021e2ff1421e2
1074+
ORR $0xff0000ff, R1 // ORR $4278190335, R1 // ff1081e3ff1481e3
1075+
SUB $0xff0000ff, R1 // SUB $4278190335, R1 // ff1041e2ff1441e2
1076+
BIC $0xff0000ff, R1 // BIC $4278190335, R1 // ff10c1e3ff14c1e3
1077+
RSB $0xff0000ff, R1 // RSB $4278190335, R1 // ff1061e2ff1481e2
1078+
ADC $0xff0000ff, R1 // ADC $4278190335, R1 // ff10a1e2ff1481e2
1079+
SBC $0xff0000ff, R1 // SBC $4278190335, R1 // ff10c1e2ff1441e2
1080+
RSC $0xff0000ff, R1 // RSC $4278190335, R1 // ff10e1e2ff1481e2
1081+
ADD $0x000fffff, R1 // ADD $1048575, R1 // 011681e2011041e2
1082+
ADC $0x000fffff, R1 // ADC $1048575, R1 // 0116a1e2011041e2
1083+
SUB $0x000fffff, R1 // SUB $1048575, R1 // 011641e2011081e2
1084+
SBC $0x000fffff, R1 // SBC $1048575, R1 // 0116c1e2011081e2
1085+
RSB $0x000fffff, R1 // RSB $1048575, R1 // 011661e2011041e2
1086+
RSC $0x000fffff, R1 // RSC $1048575, R1 // 0116e1e2011041e2
1087+
1088+
// MVN
1089+
MVN $0xff, R1 // MVN $255, R1 // ff10e0e3
1090+
MVN $0xff000000, R1 // MVN $4278190080, R1 // ff14e0e3
1091+
MVN.S $0xff, R1 // MVN.S $255, R1 // ff10f0e3
1092+
MVN.S $0xff000000, R1 // MVN.S $4278190080, R1 // ff14f0e3
1093+
MVN R9<<30, R7 // 097fe0e1
1094+
MVN R9>>30, R7 // 297fe0e1
1095+
MVN R9->30, R7 // 497fe0e1
1096+
MVN R9@>30, R7 // 697fe0e1
1097+
MVN.S R9<<30, R7 // 097ff0e1
1098+
MVN.S R9>>30, R7 // 297ff0e1
1099+
MVN.S R9->30, R7 // 497ff0e1
1100+
MVN.S R9@>30, R7 // 697ff0e1
1101+
MVN R9<<R8, R7 // 1978e0e1
1102+
MVN R9>>R8, R7 // 3978e0e1
1103+
MVN R9->R8, R7 // 5978e0e1
1104+
MVN R9@>R8, R7 // 7978e0e1
1105+
MVN.S R9<<R8, R7 // 1978f0e1
1106+
MVN.S R9>>R8, R7 // 3978f0e1
1107+
MVN.S R9->R8, R7 // 5978f0e1
1108+
MVN.S R9@>R8, R7 // 7978f0e1
1109+
MVN $0xffffffae, R5 // MVN $4294967214, R5 // 51b0e0e30b50e0e1
1110+
MVN.S $0xffffffae, R5 // MVN.S $4294967214, R5 // 51b0e0e30b50f0e1
1111+
1112+
// MOVW
1113+
mov_label_0:
1114+
MOVW $0xff, R9 // MOVW $255, R9 // ff90a0e3
1115+
MOVW $0xff000000, R9 // MOVW $4278190080, R9 // ff94a0e3
1116+
MOVW R3, R4 // 0340a0e1
1117+
MOVW $0xff(R0), R1 // MOVW $255(R0), R1 // ff1080e2
1118+
MOVW $-0xff(R0), R1 // MOVW $-255(R0), R1 // ff1040e2
1119+
MOVW $0xffffffae, R1 // MOVW $4294967214, R1 // 5110e0e3
1120+
MOVW $0xaaaaaaaa, R1 // MOVW $2863311530, R1
1121+
MOVW $mov_label_0(SB), R2 // MOVW $mov_label_0(SB), R2
1122+
10061123
//
10071124
// END
10081125
//

‎src/cmd/internal/obj/arm/asm5.go

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -154,8 +154,11 @@ var optab = []Optab{
154154
{AMVN, C_SCON, C_NONE, C_REG, 13, 8, 0, 0, 0},
155155
{ACMP, C_SCON, C_REG, C_NONE, 13, 8, 0, 0, 0},
156156
{AADD, C_RCON2A, C_REG, C_REG, 106, 8, 0, 0, 0},
157+
{AADD, C_RCON2A, C_NONE, C_REG, 106, 8, 0, 0, 0},
157158
{AORR, C_RCON2A, C_REG, C_REG, 106, 8, 0, 0, 0},
159+
{AORR, C_RCON2A, C_NONE, C_REG, 106, 8, 0, 0, 0},
158160
{AADD, C_RCON2S, C_REG, C_REG, 107, 8, 0, 0, 0},
161+
{AADD, C_RCON2S, C_NONE, C_REG, 107, 8, 0, 0, 0},
159162
{AADD, C_LCON, C_REG, C_REG, 13, 8, 0, LFROM, 0},
160163
{AADD, C_LCON, C_NONE, C_REG, 13, 8, 0, LFROM, 0},
161164
{AAND, C_LCON, C_REG, C_REG, 13, 8, 0, LFROM, 0},
@@ -1063,7 +1066,7 @@ func immrot2a(v uint32) (uint32, uint32) {
10631066
// such that the encoded constants y, x satisfy y-x==v, y&x==0.
10641067
// Returns 0,0 if no such decomposition of v exists.
10651068
func immrot2s(v uint32) (uint32, uint32) {
1066-
if immrot(v) == 0 {
1069+
if immrot(v) != 0 {
10671070
return v, 0
10681071
}
10691072
// suppose v in the form of {leading 00, upper effective bits, lower 8 effective bits, trailing 00}
@@ -1717,6 +1720,9 @@ func (c *ctxt5) asmout(p *obj.Prog, o *Optab, out []uint32) {
17171720
c.aclass(&p.From)
17181721
r := int(p.Reg)
17191722
rt := int(p.To.Reg)
1723+
if r == 0 {
1724+
r = rt
1725+
}
17201726
x, y := immrot2a(uint32(c.instoffset))
17211727
var as2 obj.As
17221728
switch p.As {
@@ -1744,6 +1750,9 @@ func (c *ctxt5) asmout(p *obj.Prog, o *Optab, out []uint32) {
17441750
c.aclass(&p.From)
17451751
r := int(p.Reg)
17461752
rt := int(p.To.Reg)
1753+
if r == 0 {
1754+
r = rt
1755+
}
17471756
y, x := immrot2s(uint32(c.instoffset))
17481757
var as2 obj.As
17491758
switch p.As {

0 commit comments

Comments
 (0)