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cherrymuicherrymui
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cmd/internal/obj/mips: add support of LLV, SCV, NOOP instructions
LLV and SCV are 64-bit load-linked and store-conditional. They were used in runtime as #define WORD. Change them to normal instruction form. NOOP is hardware no-op. It was written as WORD $0. Make a name for it for better disassembly output. Fixes #12561. Fixes #18238. Change-Id: I82c667ce756fa83ef37b034b641e8c4366335e83 Reviewed-on: https://go-review.googlesource.com/40297 Reviewed-by: Minux Ma <[email protected]> Run-TryBot: Minux Ma <[email protected]> TryBot-Result: Gobot Gobot <[email protected]>
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7 files changed

+61
-56
lines changed

7 files changed

+61
-56
lines changed

‎src/cmd/asm/internal/asm/testdata/mips64.s

+15-7
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,9 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
3939
MOVV 16(R1), R2
4040
MOVV (R1), R2
4141

42+
LL (R1), R2 // c0220000
43+
LLV (R1), R2 // d0220000
44+
4245
// LMOVB rreg ',' rreg
4346
// {
4447
// outcode(int($1), &$2, 0, &$4);
@@ -98,6 +101,9 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
98101
MOVV R1, 16(R2)
99102
MOVV R1, (R2)
100103

104+
SC R1, (R2) // e0410000
105+
SCV R1, (R2) // f0410000
106+
101107
// LMOVB rreg ',' addr
102108
// {
103109
// outcode(int($1), &$2, 0, &$4);
@@ -238,11 +244,11 @@ TEXT foo(SB),DUPOK|NOSPLIT,$0
238244
label0:
239245
JMP 1(PC)
240246
BEQ R1, 2(PC)
241-
JMP label0+0 // JMP 64
247+
JMP label0+0 // JMP 68
242248
BEQ R1, 2(PC)
243249
JAL 1(PC) // CALL 1(PC)
244250
BEQ R1, 2(PC)
245-
JAL label0+0 // CALL 64
251+
JAL label0+0 // CALL 68
246252

247253
// LBRA addr
248254
// {
@@ -266,15 +272,15 @@ label0:
266272
// }
267273
label1:
268274
BEQ R1, 1(PC)
269-
BEQ R1, label1 // BEQ R1, 79
275+
BEQ R1, label1 // BEQ R1, 83
270276

271277
// LBRA rreg ',' sreg ',' rel
272278
// {
273279
// outcode(int($1), &$2, 0, &$4);
274280
// }
275281
label2:
276282
BEQ R1, R2, 1(PC)
277-
BEQ R1, R2, label2 // BEQ R1, R2, 81
283+
BEQ R1, R2, label2 // BEQ R1, R2, 85
278284

279285
//
280286
// other integer conditional branch
@@ -285,15 +291,15 @@ label2:
285291
// }
286292
label3:
287293
BLTZ R1, 1(PC)
288-
BLTZ R1, label3 // BLTZ R1, 83
294+
BLTZ R1, label3 // BLTZ R1, 87
289295

290296
//
291297
// floating point conditional branch
292298
//
293299
// LBRA rel
294300
label4:
295301
BFPT 1(PC)
296-
BFPT label4 // BFPT 85
302+
BFPT label4 // BFPT 89
297303

298304

299305
//
@@ -327,7 +333,9 @@ label4:
327333
//
328334
// WORD
329335
//
330-
WORD $1
336+
WORD $1 // 00000001
337+
NOOP // 00000000
338+
SYNC // 0000000f
331339

332340
//
333341
// NOP

‎src/cmd/internal/obj/mips/a.out.go

+3
Original file line numberDiff line numberDiff line change
@@ -299,6 +299,7 @@ const (
299299
ADIVW
300300
AGOK
301301
ALL
302+
ALLV
302303
ALUI
303304
AMOVB
304305
AMOVBU
@@ -323,12 +324,14 @@ const (
323324
ANEGD
324325
ANEGF
325326
ANEGW
327+
ANOOP // hardware nop
326328
ANOR
327329
AOR
328330
AREM
329331
AREMU
330332
ARFE
331333
ASC
334+
ASCV
332335
ASGT
333336
ASGTU
334337
ASLL

‎src/cmd/internal/obj/mips/anames.go

+3
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@ var Anames = []string{
4545
"DIVW",
4646
"GOK",
4747
"LL",
48+
"LLV",
4849
"LUI",
4950
"MOVB",
5051
"MOVBU",
@@ -69,12 +70,14 @@ var Anames = []string{
6970
"NEGD",
7071
"NEGF",
7172
"NEGW",
73+
"NOOP",
7274
"NOR",
7375
"OR",
7476
"REM",
7577
"REMU",
7678
"RFE",
7779
"SC",
80+
"SCV",
7881
"SGT",
7982
"SGTU",
8083
"SLL",

‎src/cmd/internal/obj/mips/asm0.go

+11
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ var optab = []Optab{
129129
{AMOVWL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0},
130130
{AMOVVL, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64},
131131
{ASC, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, 0},
132+
{ASCV, C_REG, C_NONE, C_SOREG, 7, 4, REGZERO, sys.MIPS64},
132133

133134
{AMOVW, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64},
134135
{AMOVWU, C_SEXT, C_NONE, C_REG, 8, 4, REGSB, sys.MIPS64},
@@ -152,6 +153,7 @@ var optab = []Optab{
152153
{AMOVWL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0},
153154
{AMOVVL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64},
154155
{ALL, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, 0},
156+
{ALLV, C_SOREG, C_NONE, C_REG, 8, 4, REGZERO, sys.MIPS64},
155157

156158
{AMOVW, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64},
157159
{AMOVWU, C_REG, C_NONE, C_LEXT, 35, 12, REGSB, sys.MIPS64},
@@ -963,6 +965,7 @@ func buildop(ctxt *obj.Link) {
963965

964966
case ASYSCALL:
965967
opset(ASYNC, r0)
968+
opset(ANOOP, r0)
966969
opset(ATLBP, r0)
967970
opset(ATLBR, r0)
968971
opset(ATLBWI, r0)
@@ -994,7 +997,9 @@ func buildop(ctxt *obj.Link) {
994997
AJMP,
995998
AMOVWU,
996999
ALL,
1000+
ALLV,
9971001
ASC,
1002+
ASCV,
9981003
AWORD,
9991004
obj.ANOP,
10001005
obj.ATEXT,
@@ -1741,6 +1746,8 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
17411746

17421747
case ASYNC:
17431748
return OP(1, 7)
1749+
case ANOOP:
1750+
return 0
17441751

17451752
case ACMOVN:
17461753
return OP(1, 3)
@@ -1913,8 +1920,12 @@ func (c *ctxt0) opirr(a obj.As) uint32 {
19131920
return OP(6, 6)
19141921
case -ALL:
19151922
return SP(6, 0)
1923+
case -ALLV:
1924+
return SP(6, 4)
19161925
case ASC:
19171926
return SP(7, 0)
1927+
case ASCV:
1928+
return SP(7, 4)
19181929
}
19191930

19201931
if a < 0 {

‎src/cmd/internal/obj/mips/obj0.go

+1-9
Original file line numberDiff line numberDiff line change
@@ -786,16 +786,8 @@ func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog {
786786

787787
func (c *ctxt0) addnop(p *obj.Prog) {
788788
q := c.newprog()
789-
// we want to use the canonical NOP (SLL $0,R0,R0) here,
790-
// however, as the assembler will always replace $0
791-
// as R0, we have to resort to manually encode the SLL
792-
// instruction as WORD $0.
793-
q.As = AWORD
789+
q.As = ANOOP
794790
q.Pos = p.Pos
795-
q.From.Type = obj.TYPE_CONST
796-
q.From.Name = obj.NAME_NONE
797-
q.From.Offset = 0
798-
799791
q.Link = p.Link
800792
p.Link = q
801793
}

‎src/runtime/internal/atomic/asm_mips64x.s

+16-22
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,6 @@
66

77
#include "textflag.h"
88

9-
#define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
10-
#define LLV(base, rt) WORD $((064<<26)|((base)<<21)|((rt)<<16))
11-
#define SC(base, rt) WORD $((070<<26)|((base)<<21)|((rt)<<16))
12-
#define SCV(base, rt) WORD $((074<<26)|((base)<<21)|((rt)<<16))
13-
#define SYNC WORD $0xf
14-
159
// bool cas(uint32 *ptr, uint32 old, uint32 new)
1610
// Atomically:
1711
// if(*val == old){
@@ -26,9 +20,9 @@ TEXT ·Cas(SB), NOSPLIT, $0-17
2620
SYNC
2721
cas_again:
2822
MOVV R5, R3
29-
LL(1, 4) // R4 = *R1
23+
LL (R1), R4
3024
BNE R2, R4, cas_fail
31-
SC(1, 3) // *R1 = R3
25+
SC R3, (R1)
3226
BEQ R3, cas_again
3327
MOVV $1, R1
3428
MOVB R1, ret+16(FP)
@@ -53,9 +47,9 @@ TEXT ·Cas64(SB), NOSPLIT, $0-25
5347
SYNC
5448
cas64_again:
5549
MOVV R5, R3
56-
LLV(1, 4) // R4 = *R1
50+
LLV (R1), R4
5751
BNE R2, R4, cas64_fail
58-
SCV(1, 3) // *R1 = R3
52+
SCV R3, (R1)
5953
BEQ R3, cas64_again
6054
MOVV $1, R1
6155
MOVB R1, ret+24(FP)
@@ -104,10 +98,10 @@ TEXT ·Xadd(SB), NOSPLIT, $0-20
10498
MOVV ptr+0(FP), R2
10599
MOVW delta+8(FP), R3
106100
SYNC
107-
LL(2, 1) // R1 = *R2
101+
LL (R2), R1
108102
ADDU R1, R3, R4
109103
MOVV R4, R1
110-
SC(2, 4) // *R2 = R4
104+
SC R4, (R2)
111105
BEQ R4, -4(PC)
112106
MOVW R1, ret+16(FP)
113107
SYNC
@@ -117,10 +111,10 @@ TEXT ·Xadd64(SB), NOSPLIT, $0-24
117111
MOVV ptr+0(FP), R2
118112
MOVV delta+8(FP), R3
119113
SYNC
120-
LLV(2, 1) // R1 = *R2
114+
LLV (R2), R1
121115
ADDVU R1, R3, R4
122116
MOVV R4, R1
123-
SCV(2, 4) // *R2 = R4
117+
SCV R4, (R2)
124118
BEQ R4, -4(PC)
125119
MOVV R1, ret+16(FP)
126120
SYNC
@@ -132,8 +126,8 @@ TEXT ·Xchg(SB), NOSPLIT, $0-20
132126

133127
SYNC
134128
MOVV R5, R3
135-
LL(2, 1) // R1 = *R2
136-
SC(2, 3) // *R2 = R3
129+
LL (R2), R1
130+
SC R3, (R2)
137131
BEQ R3, -3(PC)
138132
MOVW R1, ret+16(FP)
139133
SYNC
@@ -145,8 +139,8 @@ TEXT ·Xchg64(SB), NOSPLIT, $0-24
145139

146140
SYNC
147141
MOVV R5, R3
148-
LLV(2, 1) // R1 = *R2
149-
SCV(2, 3) // *R2 = R3
142+
LLV (R2), R1
143+
SCV R3, (R2)
150144
BEQ R3, -3(PC)
151145
MOVV R1, ret+16(FP)
152146
SYNC
@@ -193,9 +187,9 @@ TEXT ·Or8(SB), NOSPLIT, $0-9
193187
SLLV R4, R2
194188

195189
SYNC
196-
LL(3, 4) // R4 = *R3
190+
LL (R3), R4
197191
OR R2, R4
198-
SC(3, 4) // *R3 = R4
192+
SC R4, (R3)
199193
BEQ R4, -4(PC)
200194
SYNC
201195
RET
@@ -223,9 +217,9 @@ TEXT ·And8(SB), NOSPLIT, $0-9
223217
OR R5, R2
224218

225219
SYNC
226-
LL(3, 4) // R4 = *R3
220+
LL (R3), R4
227221
AND R2, R4
228-
SC(3, 4) // *R3 = R4
222+
SC R4, (R3)
229223
BEQ R4, -4(PC)
230224
SYNC
231225
RET

‎src/sync/atomic/asm_mips64x.s

+12-18
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,6 @@
66

77
#include "textflag.h"
88

9-
#define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
10-
#define LLV(base, rt) WORD $((064<<26)|((base)<<21)|((rt)<<16))
11-
#define SC(base, rt) WORD $((070<<26)|((base)<<21)|((rt)<<16))
12-
#define SCV(base, rt) WORD $((074<<26)|((base)<<21)|((rt)<<16))
13-
#define SYNC WORD $0xf
14-
159
TEXT ·SwapInt32(SB),NOSPLIT,$0-20
1610
JMP ·SwapUint32(SB)
1711

@@ -20,8 +14,8 @@ TEXT ·SwapUint32(SB),NOSPLIT,$0-20
2014
MOVW new+8(FP), R5
2115
SYNC
2216
MOVV R5, R3
23-
LL(2, 1) // R1 = *R2
24-
SC(2, 3) // *R2 = R3
17+
LL (R2), R1
18+
SC R3, (R2)
2519
BEQ R3, -3(PC)
2620
MOVW R1, old+16(FP)
2721
SYNC
@@ -35,8 +29,8 @@ TEXT ·SwapUint64(SB),NOSPLIT,$0-24
3529
MOVV new+8(FP), R5
3630
SYNC
3731
MOVV R5, R3
38-
LLV(2, 1) // R1 = *R2
39-
SCV(2, 3) // *R2 = R3
32+
LLV (R2), R1
33+
SCV R3, (R2)
4034
BEQ R3, -3(PC)
4135
MOVV R1, old+16(FP)
4236
SYNC
@@ -55,9 +49,9 @@ TEXT ·CompareAndSwapUint32(SB),NOSPLIT,$0-17
5549
SYNC
5650
cas_again:
5751
MOVV R5, R3
58-
LL(1, 4) // R4 = *R1
52+
LL (R1), R4
5953
BNE R2, R4, cas_fail
60-
SC(1, 3) // *R1 = R3
54+
SC R3, (R1)
6155
BEQ R3, cas_again
6256
MOVV $1, R1
6357
MOVB R1, swapped+16(FP)
@@ -80,9 +74,9 @@ TEXT ·CompareAndSwapUint64(SB),NOSPLIT,$0-25
8074
SYNC
8175
cas64_again:
8276
MOVV R5, R3
83-
LLV(1, 4) // R4 = *R1
77+
LLV (R1), R4
8478
BNE R2, R4, cas64_fail
85-
SCV(1, 3) // *R1 = R3
79+
SCV R3, (R1)
8680
BEQ R3, cas64_again
8781
MOVV $1, R1
8882
MOVB R1, swapped+24(FP)
@@ -99,10 +93,10 @@ TEXT ·AddUint32(SB),NOSPLIT,$0-20
9993
MOVV addr+0(FP), R2
10094
MOVW delta+8(FP), R3
10195
SYNC
102-
LL(2, 1) // R1 = *R2
96+
LL (R2), R1
10397
ADDU R1, R3, R4
10498
MOVV R4, R1
105-
SC(2, 4) // *R2 = R4
99+
SC R4, (R2)
106100
BEQ R4, -4(PC)
107101
MOVW R1, new+16(FP)
108102
SYNC
@@ -118,10 +112,10 @@ TEXT ·AddUint64(SB),NOSPLIT,$0-24
118112
MOVV addr+0(FP), R2
119113
MOVV delta+8(FP), R3
120114
SYNC
121-
LLV(2, 1) // R1 = *R2
115+
LLV (R2), R1
122116
ADDVU R1, R3, R4
123117
MOVV R4, R1
124-
SCV(2, 4) // *R2 = R4
118+
SCV R4, (R2)
125119
BEQ R4, -4(PC)
126120
MOVV R1, new+16(FP)
127121
SYNC

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