Skip to content

Commit 9a9a8c0

Browse files
ceseolaboger
authored andcommitted
cmd/asm, cmd/internal/obj/ppc64: add Immediate Shifted opcodes for ppc64x
This change adds ADD/AND/OR/XOR Immediate Shifted instructions for ppc64x so they are usable in Go asm code. These instructions were originally present in asm9.go, but they were only usable in that file (as -AADD, -AANDCC, -AOR, -AXOR). These old mnemonics are now removed. Updates #23845 Change-Id: Ifa2fac685e8bc628cb241dd446adfc3068181826 Reviewed-on: https://go-review.googlesource.com/94115 Reviewed-by: Lynn Boger <[email protected]>
1 parent d50bb8d commit 9a9a8c0

File tree

4 files changed

+64
-15
lines changed

4 files changed

+64
-15
lines changed

src/cmd/asm/internal/asm/testdata/ppc64.s

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1123,6 +1123,24 @@ label1:
11231123
// addex RT, RA, RB, CY
11241124
ADDEX R1, R2, $0, R3
11251125

1126+
// Immediate-shifted operations
1127+
// ADDIS SI, RA, RT produces
1128+
// addis RT, RA, SI
1129+
ADDIS $8, R3, R4
1130+
ADDIS $-1, R3, R4
1131+
1132+
// ANDISCC UI, RS, RA produces
1133+
// andis. RA, RS, UI
1134+
ANDISCC $7, R4, R5
1135+
1136+
// ORIS UI, RS, RA produces
1137+
// oris RA, RS, UI
1138+
ORIS $4, R2, R3
1139+
1140+
// XORIS UI, RS, RA produces
1141+
// xoris RA, RS, UI
1142+
XORIS $1, R1, R2
1143+
11261144
//
11271145
// NOP
11281146
//

src/cmd/internal/obj/ppc64/a.out.go

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -378,6 +378,7 @@ const (
378378
const (
379379
AADD = obj.ABasePPC64 + obj.A_ARCHSPECIFIC + iota
380380
AADDCC
381+
AADDIS
381382
AADDV
382383
AADDVCC
383384
AADDC
@@ -401,6 +402,7 @@ const (
401402
AANDCC
402403
AANDN
403404
AANDNCC
405+
AANDISCC
404406
ABC
405407
ABCL
406408
ABEQ
@@ -536,6 +538,7 @@ const (
536538
AORCC
537539
AORN
538540
AORNCC
541+
AORIS
539542
AREM
540543
AREMCC
541544
AREMV
@@ -581,6 +584,7 @@ const (
581584
ASYNC
582585
AXOR
583586
AXORCC
587+
AXORIS
584588

585589
ADCBF
586590
ADCBI

src/cmd/internal/obj/ppc64/anames.go

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ import "cmd/internal/obj"
88
var Anames = []string{
99
obj.A_ARCHSPECIFIC: "ADD",
1010
"ADDCC",
11+
"ADDIS",
1112
"ADDV",
1213
"ADDVCC",
1314
"ADDC",
@@ -31,6 +32,7 @@ var Anames = []string{
3132
"ANDCC",
3233
"ANDN",
3334
"ANDNCC",
35+
"ANDISCC",
3436
"BC",
3537
"BCL",
3638
"BEQ",
@@ -166,6 +168,7 @@ var Anames = []string{
166168
"ORCC",
167169
"ORN",
168170
"ORNCC",
171+
"ORIS",
169172
"REM",
170173
"REMCC",
171174
"REMV",
@@ -211,6 +214,7 @@ var Anames = []string{
211214
"SYNC",
212215
"XOR",
213216
"XORCC",
217+
"XORIS",
214218
"DCBF",
215219
"DCBI",
216220
"DCBST",

src/cmd/internal/obj/ppc64/asm9.go

Lines changed: 38 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,8 @@ var optab = []Optab{
8888
{AADD, C_ADDCON, C_NONE, C_NONE, C_REG, 4, 4, 0},
8989
{AADD, C_UCON, C_REG, C_NONE, C_REG, 20, 4, 0},
9090
{AADD, C_UCON, C_NONE, C_NONE, C_REG, 20, 4, 0},
91+
{AADDIS, C_ADDCON, C_REG, C_NONE, C_REG, 20, 4, 0},
92+
{AADDIS, C_ADDCON, C_NONE, C_NONE, C_REG, 20, 4, 0},
9193
{AADD, C_LCON, C_REG, C_NONE, C_REG, 22, 12, 0},
9294
{AADD, C_LCON, C_NONE, C_NONE, C_REG, 22, 12, 0},
9395
{AADDC, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0},
@@ -104,6 +106,8 @@ var optab = []Optab{
104106
{AANDCC, C_ANDCON, C_REG, C_NONE, C_REG, 58, 4, 0},
105107
{AANDCC, C_UCON, C_NONE, C_NONE, C_REG, 59, 4, 0},
106108
{AANDCC, C_UCON, C_REG, C_NONE, C_REG, 59, 4, 0},
109+
{AANDISCC, C_ANDCON, C_NONE, C_NONE, C_REG, 59, 4, 0},
110+
{AANDISCC, C_ANDCON, C_REG, C_NONE, C_REG, 59, 4, 0},
107111
{AANDCC, C_LCON, C_NONE, C_NONE, C_REG, 23, 12, 0},
108112
{AANDCC, C_LCON, C_REG, C_NONE, C_REG, 23, 12, 0},
109113
{AMULLW, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0},
@@ -124,6 +128,8 @@ var optab = []Optab{
124128
{AOR, C_ANDCON, C_REG, C_NONE, C_REG, 58, 4, 0},
125129
{AOR, C_UCON, C_NONE, C_NONE, C_REG, 59, 4, 0},
126130
{AOR, C_UCON, C_REG, C_NONE, C_REG, 59, 4, 0},
131+
{AORIS, C_ANDCON, C_NONE, C_NONE, C_REG, 59, 4, 0},
132+
{AORIS, C_ANDCON, C_REG, C_NONE, C_REG, 59, 4, 0},
127133
{AOR, C_LCON, C_NONE, C_NONE, C_REG, 23, 12, 0},
128134
{AOR, C_LCON, C_REG, C_NONE, C_REG, 23, 12, 0},
129135
{ADIVW, C_REG, C_REG, C_NONE, C_REG, 2, 4, 0}, /* op r1[,r2],r3 */
@@ -1522,7 +1528,6 @@ func buildop(ctxt *obj.Link) {
15221528

15231529
case AAND: /* logical op Rb,Rs,Ra; no literal */
15241530
opset(AANDN, r0)
1525-
15261531
opset(AANDNCC, r0)
15271532
opset(AEQV, r0)
15281533
opset(AEQVCC, r0)
@@ -1677,9 +1682,12 @@ func buildop(ctxt *obj.Link) {
16771682
opset(ANEGV, r0)
16781683
opset(ANEGVCC, r0)
16791684

1680-
case AOR: /* or/xor Rb,Rs,Ra; ori/xori $uimm,Rs,Ra; oris/xoris $uimm,Rs,Ra */
1685+
case AOR: /* or/xor Rb,Rs,Ra; ori/xori $uimm,Rs,R */
16811686
opset(AXOR, r0)
16821687

1688+
case AORIS: /* oris/xoris $uimm,Rs,Ra */
1689+
opset(AXORIS, r0)
1690+
16831691
case ASLW:
16841692
opset(ASLWCC, r0)
16851693
opset(ASRW, r0)
@@ -1792,7 +1800,9 @@ func buildop(ctxt *obj.Link) {
17921800
opset(AFTSQRT, r0)
17931801

17941802
case AADD,
1795-
AANDCC, /* and. Rb,Rs,Ra; andi. $uimm,Rs,Ra; andis. $uimm,Rs,Ra */
1803+
AADDIS,
1804+
AANDCC, /* and. Rb,Rs,Ra; andi. $uimm,Rs,Ra */
1805+
AANDISCC,
17961806
AFMOVSX,
17971807
AFMOVSZ,
17981808
ALSW,
@@ -2624,7 +2634,7 @@ func (c *ctxt9) asmout(p *obj.Prog, o *Optab, out []uint32) {
26242634

26252635
//if(dlm) reloc(&p->from, p->pc, 0);
26262636

2627-
case 20: /* add $ucon,,r */
2637+
case 20: /* add $ucon,,r | addis $addcon,r,r */
26282638
v := c.regoff(&p.From)
26292639

26302640
r := int(p.Reg)
@@ -2634,7 +2644,11 @@ func (c *ctxt9) asmout(p *obj.Prog, o *Optab, out []uint32) {
26342644
if p.As == AADD && (r0iszero == 0 /*TypeKind(100016)*/ && p.Reg == 0 || r0iszero != 0 /*TypeKind(100016)*/ && p.To.Reg == 0) {
26352645
c.ctxt.Diag("literal operation on R0\n%v", p)
26362646
}
2637-
o1 = AOP_IRR(c.opirr(-p.As), uint32(p.To.Reg), uint32(r), uint32(v)>>16)
2647+
if p.As == AADDIS {
2648+
o1 = AOP_IRR(c.opirr(p.As), uint32(p.To.Reg), uint32(r), uint32(v))
2649+
} else {
2650+
o1 = AOP_IRR(c.opirr(AADDIS), uint32(p.To.Reg), uint32(r), uint32(v)>>16)
2651+
}
26382652

26392653
case 22: /* add $lcon,r1,r2 ==> cau+or+add */ /* could do add/sub more efficiently */
26402654
if p.To.Reg == REGTMP || p.Reg == REGTMP {
@@ -3063,14 +3077,23 @@ func (c *ctxt9) asmout(p *obj.Prog, o *Optab, out []uint32) {
30633077
}
30643078
o1 = LOP_IRR(c.opirr(p.As), uint32(p.To.Reg), uint32(r), uint32(v))
30653079

3066-
case 59: /* or/and $ucon,,r */
3080+
case 59: /* or/xor/and $ucon,,r | oris/xoris/andis $addcon,r,r */
30673081
v := c.regoff(&p.From)
30683082

30693083
r := int(p.Reg)
30703084
if r == 0 {
30713085
r = int(p.To.Reg)
30723086
}
3073-
o1 = LOP_IRR(c.opirr(-p.As), uint32(p.To.Reg), uint32(r), uint32(v)>>16) /* oris, xoris, andis */
3087+
switch p.As {
3088+
case AOR:
3089+
o1 = LOP_IRR(c.opirr(AORIS), uint32(p.To.Reg), uint32(r), uint32(v)>>16) /* oris, xoris, andis. */
3090+
case AXOR:
3091+
o1 = LOP_IRR(c.opirr(AXORIS), uint32(p.To.Reg), uint32(r), uint32(v)>>16)
3092+
case AANDCC:
3093+
o1 = LOP_IRR(c.opirr(AANDCC), uint32(p.To.Reg), uint32(r), uint32(v)>>16)
3094+
default:
3095+
o1 = LOP_IRR(c.opirr(p.As), uint32(p.To.Reg), uint32(r), uint32(v))
3096+
}
30743097

30753098
case 60: /* tw to,a,b */
30763099
r := int(c.regoff(&p.From) & 31)
@@ -4442,13 +4465,13 @@ func (c *ctxt9) opirr(a obj.As) uint32 {
44424465
return OPVCC(12, 0, 0, 0)
44434466
case AADDCCC:
44444467
return OPVCC(13, 0, 0, 0)
4445-
case -AADD:
4446-
return OPVCC(15, 0, 0, 0) /* ADDIS/CAU */
4468+
case AADDIS:
4469+
return OPVCC(15, 0, 0, 0) /* ADDIS */
44474470

44484471
case AANDCC:
44494472
return OPVCC(28, 0, 0, 0)
4450-
case -AANDCC:
4451-
return OPVCC(29, 0, 0, 0) /* ANDIS./ANDIU. */
4473+
case AANDISCC:
4474+
return OPVCC(29, 0, 0, 0) /* ANDIS. */
44524475

44534476
case ABR:
44544477
return OPVCC(18, 0, 0, 0)
@@ -4506,8 +4529,8 @@ func (c *ctxt9) opirr(a obj.As) uint32 {
45064529

45074530
case AOR:
45084531
return OPVCC(24, 0, 0, 0)
4509-
case -AOR:
4510-
return OPVCC(25, 0, 0, 0) /* ORIS/ORIU */
4532+
case AORIS:
4533+
return OPVCC(25, 0, 0, 0) /* ORIS */
45114534

45124535
case ARLWMI:
45134536
return OPVCC(20, 0, 0, 0) /* rlwimi */
@@ -4584,8 +4607,8 @@ func (c *ctxt9) opirr(a obj.As) uint32 {
45844607

45854608
case AXOR:
45864609
return OPVCC(26, 0, 0, 0) /* XORIL */
4587-
case -AXOR:
4588-
return OPVCC(27, 0, 0, 0) /* XORIU */
4610+
case AXORIS:
4611+
return OPVCC(27, 0, 0, 0) /* XORIS */
45894612
}
45904613

45914614
c.ctxt.Diag("bad opcode i/r or i/r/r %v", a)

0 commit comments

Comments
 (0)