cmd/asm: fix bug about VMOV instruction (move register to vector element) on ARM64

This change fixes index error when encoding VMOV instruction which pattern is
VMOV Rn, V.<T>[index]. For example VMOV R1, V1.S[1] is assembled as VMOV R1, V1.S[0]

Fixes #24400
Change-Id: I82b5edc8af4e06862bc4692b119697c6bb7dc3fb
Reviewed-on: https://go-review.googlesource.com/101297
Reviewed-by: Cherry Zhang <[email protected]>

Author: zorrorffm

src/cmd/asm/internal/asm/testdata/arm64.s

@@ -230,6 +230,7 @@ TEXT	foo(SB), DUPOK|NOSPLIT, $-8
 	VMOV	V0.D[0], R11          // 0b3c084e
 	VMOV	V0.D[1], R11          // 0b3c184e
 	VMOV	R20, V1.S[0]          // 811e044e
+	VMOV	R20, V1.S[1]          // 811e0c4e
 	VMOV	R1, V9.H4             // 290c020e
 	VMOV	R22, V11.D2           // cb0e084e
 	VMOV 	V2.B16, V4.B16        // 441ca24e

src/cmd/internal/obj/arm64/asm7.go

@@ -3563,7 +3563,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
 		rt := int(p.To.Reg)
 		imm5 := 0
 		o1 = 1<<30 | 7<<25 | 7<<10
-		index := int(p.From.Index)
+		index := int(p.To.Index)
 		switch (p.To.Reg >> 5) & 15 {
 		case ARNG_B:
 			c.checkindex(p, index, 15)