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runtime/internal/atomic: set SP delta correctly for 64-bit atomic functions on ARM
64-bit atomic functions on ARM have the following structure: - check if the address is 64-bit aligned, if not, prepare a frame and call panicUnaligned - tail call armXXX or goXXX depending on GOARM The alignment check calls panicUnaligned after preparing a frame, so the stack can be unwound. The call never returns, so the SP is not set back. However, the assembler assigns SP delta following the instruction stream order, not the control flow. So it leaves a nonzero SP delta after the check, to the tail call instructions, which is wrong because when they are executed the SP is not decremented. This CL fixes this by adding the SP back (the instruction never executes, just tells the assembler to set the SP delta back). Should fix #51353. Change-Id: I976cb1cfb0e9008b13538765cbc7eea0c19c7130 Reviewed-on: https://go-review.googlesource.com/c/go/+/388014 Trust: Cherry Mui <[email protected]> Run-TryBot: Cherry Mui <[email protected]> TryBot-Result: Gopher Robot <[email protected]> Reviewed-by: Michael Pratt <[email protected]>
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src/runtime/internal/atomic/atomic_arm.s

Lines changed: 16 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -229,16 +229,22 @@ store64loop:
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// functions tail-call into the appropriate implementation, which
230230
// means they must not open a frame. Hence, when they go down the
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// panic path, at that point they push the LR to create a real frame
232-
// (they don't need to pop it because panic won't return).
232+
// (they don't need to pop it because panic won't return; however, we
233+
// do need to set the SP delta back).
234+
235+
// Check if R1 is 8-byte aligned, panic if not.
236+
// Clobbers R2.
237+
#define CHECK_ALIGN \
238+
AND.S $7, R1, R2 \
239+
BEQ 4(PC) \
240+
MOVW.W R14, -4(R13) /* prepare a real frame */ \
241+
BL ·panicUnaligned(SB) \
242+
ADD $4, R13 /* compensate SP delta */
233243

234244
TEXT ·Cas64(SB),NOSPLIT,$-4-21
235245
NO_LOCAL_POINTERS
236246
MOVW addr+0(FP), R1
237-
// make unaligned atomic access panic
238-
AND.S $7, R1, R2
239-
BEQ 3(PC)
240-
MOVW.W R14, -4(R13) // prepare a real frame
241-
BL ·panicUnaligned(SB)
247+
CHECK_ALIGN
242248

243249
MOVB runtime·goarm(SB), R11
244250
CMP $7, R11
@@ -249,11 +255,7 @@ TEXT ·Cas64(SB),NOSPLIT,$-4-21
249255
TEXT ·Xadd64(SB),NOSPLIT,$-4-20
250256
NO_LOCAL_POINTERS
251257
MOVW addr+0(FP), R1
252-
// make unaligned atomic access panic
253-
AND.S $7, R1, R2
254-
BEQ 3(PC)
255-
MOVW.W R14, -4(R13) // prepare a real frame
256-
BL ·panicUnaligned(SB)
258+
CHECK_ALIGN
257259

258260
MOVB runtime·goarm(SB), R11
259261
CMP $7, R11
@@ -264,11 +266,7 @@ TEXT ·Xadd64(SB),NOSPLIT,$-4-20
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TEXT ·Xchg64(SB),NOSPLIT,$-4-20
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NO_LOCAL_POINTERS
266268
MOVW addr+0(FP), R1
267-
// make unaligned atomic access panic
268-
AND.S $7, R1, R2
269-
BEQ 3(PC)
270-
MOVW.W R14, -4(R13) // prepare a real frame
271-
BL ·panicUnaligned(SB)
269+
CHECK_ALIGN
272270

273271
MOVB runtime·goarm(SB), R11
274272
CMP $7, R11
@@ -279,11 +277,7 @@ TEXT ·Xchg64(SB),NOSPLIT,$-4-20
279277
TEXT ·Load64(SB),NOSPLIT,$-4-12
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NO_LOCAL_POINTERS
281279
MOVW addr+0(FP), R1
282-
// make unaligned atomic access panic
283-
AND.S $7, R1, R2
284-
BEQ 3(PC)
285-
MOVW.W R14, -4(R13) // prepare a real frame
286-
BL ·panicUnaligned(SB)
280+
CHECK_ALIGN
287281

288282
MOVB runtime·goarm(SB), R11
289283
CMP $7, R11
@@ -294,11 +288,7 @@ TEXT ·Load64(SB),NOSPLIT,$-4-12
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TEXT ·Store64(SB),NOSPLIT,$-4-12
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NO_LOCAL_POINTERS
296290
MOVW addr+0(FP), R1
297-
// make unaligned atomic access panic
298-
AND.S $7, R1, R2
299-
BEQ 3(PC)
300-
MOVW.W R14, -4(R13) // prepare a real frame
301-
BL ·panicUnaligned(SB)
291+
CHECK_ALIGN
302292

303293
MOVB runtime·goarm(SB), R11
304294
CMP $7, R11

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