cmd/compile: enable branchelim pass on ppc64

and fix/cleanup lowering of the SSA operator created by the pass.

Change-Id: I7e6153194fd16013e3b24da8aa40683adafa3d15
Reviewed-on: https://go-review.googlesource.com/c/go/+/344573
Run-TryBot: Paul Murphy <[email protected]>
TryBot-Result: Go Bot <[email protected]>
Reviewed-by: Lynn Boger <[email protected]>
Reviewed-by: Cherry Mui <[email protected]>
Trust: Josh Bleecher Snyder <[email protected]>

Author: pmur

src/cmd/compile/internal/ssa/branchelim.go

@@ -22,7 +22,7 @@ import "cmd/internal/src"
 func branchelim(f *Func) {
 	// FIXME: add support for lowering CondSelects on more architectures
 	switch f.Config.arch {
-	case "arm64", "amd64", "wasm":
+	case "arm64", "ppc64le", "ppc64", "amd64", "wasm":
 		// implemented
 	default:
 		return

src/cmd/compile/internal/ssa/gen/PPC64.rules

@@ -561,8 +561,10 @@
 ((EQ|NE|LT|LE|GT|GE) (CMPconst [0] z:(OR x y)) yes no) && z.Uses == 1 => ((EQ|NE|LT|LE|GT|GE) (ORCC x y) yes no)
 ((EQ|NE|LT|LE|GT|GE) (CMPconst [0] z:(XOR x y)) yes no) && z.Uses == 1 => ((EQ|NE|LT|LE|GT|GE) (XORCC x y) yes no)
 
-(CondSelect x y bool) && flagArg(bool) != nil => (ISEL [2] x y bool)
-(CondSelect x y bool) && flagArg(bool) == nil => (ISEL [2] x y (CMPWconst [0] bool))
+// Only lower after bool is lowered. It should always lower. This helps ensure the folding below happens reliably.
+(CondSelect x y bool) && flagArg(bool) == nil => (ISEL [6] x y (CMPWconst [0] bool))
+// Fold any CR -> GPR -> CR transfers when applying the above rule.
+(ISEL [6] x y (CMPWconst [0] (ISELB [c] one cmp))) => (ISEL [c] x y cmp)
 
 // Lowering loads
 (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) => (MOVDload ptr mem)
@@ -849,6 +851,7 @@
 (NEG (ADDconst [c] x)) && is32Bit(-c) => (SUBFCconst [-c] x)
 (NEG (SUBFCconst [c] x)) && is32Bit(-c) => (ADDconst [-c] x)
 (NEG (SUB x y)) => (SUB y x)
+(NEG (NEG x)) => x
 
 // Use register moves instead of stores and loads to move int<=>float values
 // Common with math Float64bits, Float64frombits