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namusyakamdempsky
namusyaka
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mdempsky
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cmd: avoid unnecessary type conversions
CL generated mechanically with github.com/mdempsky/unconvert. Also updated cmd/compile/internal/ssa/gen/*.rules manually. Change-Id: If721ef73cf0771ae83ce7e2d11623fc8d9155768 Reviewed-on: https://go-review.googlesource.com/97075 Reviewed-by: Matthew Dempsky <[email protected]> Run-TryBot: Matthew Dempsky <[email protected]> TryBot-Result: Gobot Gobot <[email protected]>
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29 files changed

+166
-166
lines changed

29 files changed

+166
-166
lines changed

‎src/cmd/asm/internal/arch/arm64.go

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -133,49 +133,49 @@ func ARM64RegisterExtension(a *obj.Addr, ext string, reg, num int16, isAmount, i
133133
if !isAmount {
134134
return errors.New("invalid register extension")
135135
}
136-
a.Reg = arm64.REG_UXTB + (reg & 31) + int16(num<<5)
136+
a.Reg = arm64.REG_UXTB + (reg & 31) + num<<5
137137
a.Offset = int64(((rm & 31) << 16) | (uint32(num) << 10))
138138
case "UXTH":
139139
if !isAmount {
140140
return errors.New("invalid register extension")
141141
}
142-
a.Reg = arm64.REG_UXTH + (reg & 31) + int16(num<<5)
142+
a.Reg = arm64.REG_UXTH + (reg & 31) + num<<5
143143
a.Offset = int64(((rm & 31) << 16) | (1 << 13) | (uint32(num) << 10))
144144
case "UXTW":
145145
if !isAmount {
146146
return errors.New("invalid register extension")
147147
}
148-
a.Reg = arm64.REG_UXTW + (reg & 31) + int16(num<<5)
148+
a.Reg = arm64.REG_UXTW + (reg & 31) + num<<5
149149
a.Offset = int64(((rm & 31) << 16) | (2 << 13) | (uint32(num) << 10))
150150
case "UXTX":
151151
if !isAmount {
152152
return errors.New("invalid register extension")
153153
}
154-
a.Reg = arm64.REG_UXTX + (reg & 31) + int16(num<<5)
154+
a.Reg = arm64.REG_UXTX + (reg & 31) + num<<5
155155
a.Offset = int64(((rm & 31) << 16) | (3 << 13) | (uint32(num) << 10))
156156
case "SXTB":
157157
if !isAmount {
158158
return errors.New("invalid register extension")
159159
}
160-
a.Reg = arm64.REG_SXTB + (reg & 31) + int16(num<<5)
160+
a.Reg = arm64.REG_SXTB + (reg & 31) + num<<5
161161
a.Offset = int64(((rm & 31) << 16) | (4 << 13) | (uint32(num) << 10))
162162
case "SXTH":
163163
if !isAmount {
164164
return errors.New("invalid register extension")
165165
}
166-
a.Reg = arm64.REG_SXTH + (reg & 31) + int16(num<<5)
166+
a.Reg = arm64.REG_SXTH + (reg & 31) + num<<5
167167
a.Offset = int64(((rm & 31) << 16) | (5 << 13) | (uint32(num) << 10))
168168
case "SXTW":
169169
if !isAmount {
170170
return errors.New("invalid register extension")
171171
}
172-
a.Reg = arm64.REG_SXTW + (reg & 31) + int16(num<<5)
172+
a.Reg = arm64.REG_SXTW + (reg & 31) + num<<5
173173
a.Offset = int64(((rm & 31) << 16) | (6 << 13) | (uint32(num) << 10))
174174
case "SXTX":
175175
if !isAmount {
176176
return errors.New("invalid register extension")
177177
}
178-
a.Reg = arm64.REG_SXTX + (reg & 31) + int16(num<<5)
178+
a.Reg = arm64.REG_SXTX + (reg & 31) + num<<5
179179
a.Offset = int64(((rm & 31) << 16) | (7 << 13) | (uint32(num) << 10))
180180
case "B8":
181181
if isIndex {

‎src/cmd/asm/internal/asm/parse.go

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -585,7 +585,7 @@ func (p *Parser) registerShift(name string, prefix rune) int64 {
585585
p.errorf("unexpected %s in register shift", tok.String())
586586
}
587587
if p.arch.Family == sys.ARM64 {
588-
return int64(int64(r1&31)<<16 | int64(op)<<22 | int64(uint16(count)))
588+
return int64(r1&31)<<16 | int64(op)<<22 | int64(uint16(count))
589589
} else {
590590
return int64((r1 & 15) | op<<5 | count)
591591
}

‎src/cmd/cgo/gcc.go

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1350,7 +1350,7 @@ func (p *Package) gccDebug(stdin []byte, nnames int) (d *dwarf.Data, ints []int6
13501350
if len(data) <= strlen {
13511351
fatalf("invalid string literal")
13521352
}
1353-
strs[n] = string(data[:strlen])
1353+
strs[n] = data[:strlen]
13541354
}
13551355
}
13561356

‎src/cmd/compile/internal/gc/dwinl.go

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -246,8 +246,8 @@ func insertInlCall(dwcalls *dwarf.InlCalls, inlIdx int, imap map[int]int) int {
246246
}
247247

248248
// Create new entry for this inline
249-
inlinedFn := Ctxt.InlTree.InlinedFunction(int(inlIdx))
250-
callXPos := Ctxt.InlTree.CallPos(int(inlIdx))
249+
inlinedFn := Ctxt.InlTree.InlinedFunction(inlIdx)
250+
callXPos := Ctxt.InlTree.CallPos(inlIdx)
251251
absFnSym := Ctxt.DwFixups.AbsFuncDwarfSym(inlinedFn)
252252
pb := Ctxt.PosTable.Pos(callXPos).Base()
253253
callFileSym := Ctxt.Lookup(pb.SymFilename())

‎src/cmd/compile/internal/gc/plive.go

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1021,7 +1021,7 @@ Outer:
10211021
for _, v := range b.Values {
10221022
if issafepoint(v) {
10231023
lv.showlive(v, lv.livevars[remap[pos]])
1024-
lv.stackMapIndex[v] = int(remap[pos])
1024+
lv.stackMapIndex[v] = remap[pos]
10251025
pos++
10261026
}
10271027
}

‎src/cmd/compile/internal/gc/ssa.go

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4752,11 +4752,11 @@ func genssa(f *ssa.Func, pp *Progs) {
47524752
e.curfn.Func.DebugInfo.GetPC = func(b, v ssa.ID) int64 {
47534753
switch v {
47544754
case ssa.BlockStart.ID:
4755-
return int64(bstart[b].Pc)
4755+
return bstart[b].Pc
47564756
case ssa.BlockEnd.ID:
4757-
return int64(e.curfn.Func.lsym.Size)
4757+
return e.curfn.Func.lsym.Size
47584758
default:
4759-
return int64(valueToProgAfter[v].Pc)
4759+
return valueToProgAfter[v].Pc
47604760
}
47614761
}
47624762
}

‎src/cmd/compile/internal/gc/walk.go

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3409,31 +3409,31 @@ func walkcompare(n *Node, init *Nodes) *Node {
34093409
}
34103410
if step == 1 {
34113411
compare(
3412-
nod(OINDEX, cmpl, nodintconst(int64(i))),
3413-
nod(OINDEX, cmpr, nodintconst(int64(i))),
3412+
nod(OINDEX, cmpl, nodintconst(i)),
3413+
nod(OINDEX, cmpr, nodintconst(i)),
34143414
)
34153415
i++
34163416
remains -= t.Elem().Width
34173417
} else {
34183418
elemType := t.Elem().ToUnsigned()
3419-
cmplw := nod(OINDEX, cmpl, nodintconst(int64(i)))
3419+
cmplw := nod(OINDEX, cmpl, nodintconst(i))
34203420
cmplw = conv(cmplw, elemType) // convert to unsigned
34213421
cmplw = conv(cmplw, convType) // widen
3422-
cmprw := nod(OINDEX, cmpr, nodintconst(int64(i)))
3422+
cmprw := nod(OINDEX, cmpr, nodintconst(i))
34233423
cmprw = conv(cmprw, elemType)
34243424
cmprw = conv(cmprw, convType)
34253425
// For code like this: uint32(s[0]) | uint32(s[1])<<8 | uint32(s[2])<<16 ...
34263426
// ssa will generate a single large load.
34273427
for offset := int64(1); offset < step; offset++ {
3428-
lb := nod(OINDEX, cmpl, nodintconst(int64(i+offset)))
3428+
lb := nod(OINDEX, cmpl, nodintconst(i+offset))
34293429
lb = conv(lb, elemType)
34303430
lb = conv(lb, convType)
3431-
lb = nod(OLSH, lb, nodintconst(int64(8*t.Elem().Width*offset)))
3431+
lb = nod(OLSH, lb, nodintconst(8*t.Elem().Width*offset))
34323432
cmplw = nod(OOR, cmplw, lb)
3433-
rb := nod(OINDEX, cmpr, nodintconst(int64(i+offset)))
3433+
rb := nod(OINDEX, cmpr, nodintconst(i+offset))
34343434
rb = conv(rb, elemType)
34353435
rb = conv(rb, convType)
3436-
rb = nod(OLSH, rb, nodintconst(int64(8*t.Elem().Width*offset)))
3436+
rb = nod(OLSH, rb, nodintconst(8*t.Elem().Width*offset))
34373437
cmprw = nod(OOR, cmprw, rb)
34383438
}
34393439
compare(cmplw, cmprw)

‎src/cmd/compile/internal/ssa/debug.go

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ func (state *stateAtPC) reset(live []liveSlot) {
9595
reg := uint8(TrailingZeros64(mask))
9696
mask &^= 1 << reg
9797

98-
registers[reg] = append(registers[reg], SlotID(live.slot))
98+
registers[reg] = append(registers[reg], live.slot)
9999
}
100100
}
101101
state.slots, state.registers = slots, registers
@@ -636,7 +636,7 @@ func (state *debugState) processValue(v *Value, vSlots []SlotID, vReg *Register)
636636
state.f.Fatalf("at %v: slot %v in register %v with no location entry", v, state.slots[slot], &state.registers[reg])
637637
continue
638638
}
639-
regs := last.Registers &^ (1 << uint8(reg))
639+
regs := last.Registers &^ (1 << reg)
640640
setSlot(slot, VarLoc{regs, last.StackOffset})
641641
}
642642

‎src/cmd/compile/internal/ssa/gen/ARM.rules

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -297,7 +297,7 @@
297297
(Zero [s] {t} ptr mem)
298298
&& s%4 == 0 && s > 4 && s <= 512
299299
&& t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice ->
300-
(DUFFZERO [4 * (128 - int64(s/4))] ptr (MOVWconst [0]) mem)
300+
(DUFFZERO [4 * (128 - s/4)] ptr (MOVWconst [0]) mem)
301301

302302
// Large zeroing uses a loop
303303
(Zero [s] {t} ptr mem)
@@ -337,7 +337,7 @@
337337
(Move [s] {t} dst src mem)
338338
&& s%4 == 0 && s > 4 && s <= 512
339339
&& t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice ->
340-
(DUFFCOPY [8 * (128 - int64(s/4))] dst src mem)
340+
(DUFFCOPY [8 * (128 - s/4)] dst src mem)
341341

342342
// Large move uses a loop
343343
(Move [s] {t} dst src mem)

‎src/cmd/compile/internal/ssa/gen/ARM64.rules

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -409,7 +409,7 @@
409409
(Zero [s] ptr mem)
410410
&& s%16 == 0 && s > 64 && s <= 16*64
411411
&& !config.noDuffDevice ->
412-
(DUFFZERO [4 * (64 - int64(s/16))] ptr mem)
412+
(DUFFZERO [4 * (64 - s/16)] ptr mem)
413413

414414
// large zeroing uses a loop
415415
(Zero [s] ptr mem)
@@ -462,7 +462,7 @@
462462
(Move [s] dst src mem)
463463
&& s%8 == 0 && s > 24 && s <= 8*128
464464
&& !config.noDuffDevice ->
465-
(DUFFCOPY [8 * (128 - int64(s/8))] dst src mem)
465+
(DUFFCOPY [8 * (128 - s/8)] dst src mem)
466466

467467
// large move uses a loop
468468
(Move [s] dst src mem)
@@ -904,18 +904,18 @@
904904
(SUBconst [c] (MOVDconst [d])) -> (MOVDconst [d-c])
905905
(SUBconst [c] (SUBconst [d] x)) -> (ADDconst [-c-d] x)
906906
(SUBconst [c] (ADDconst [d] x)) -> (ADDconst [-c+d] x)
907-
(SLLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)<<uint64(c)])
907+
(SLLconst [c] (MOVDconst [d])) -> (MOVDconst [d<<uint64(c)])
908908
(SRLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(uint64(d)>>uint64(c))])
909-
(SRAconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)>>uint64(c)])
909+
(SRAconst [c] (MOVDconst [d])) -> (MOVDconst [d>>uint64(c)])
910910
(MUL (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c*d])
911911
(MULW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)*int32(d))])
912912
(MNEG (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [-c*d])
913913
(MNEGW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [-int64(int32(c)*int32(d))])
914-
(DIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)/int64(d)])
914+
(DIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c/d])
915915
(UDIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)/uint64(d))])
916916
(DIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)/int32(d))])
917917
(UDIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)/uint32(d))])
918-
(MOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)%int64(d)])
918+
(MOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c%d])
919919
(UMOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)%uint64(d))])
920920
(MODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)%int32(d))])
921921
(UMODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)%uint32(d))])
@@ -938,10 +938,10 @@
938938

939939
// constant comparisons
940940
(CMPconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ)
941-
(CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)<uint64(y) -> (FlagLT_ULT)
942-
(CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)>uint64(y) -> (FlagLT_UGT)
943-
(CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)<uint64(y) -> (FlagGT_ULT)
944-
(CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)>uint64(y) -> (FlagGT_UGT)
941+
(CMPconst (MOVDconst [x]) [y]) && x<y && uint64(x)<uint64(y) -> (FlagLT_ULT)
942+
(CMPconst (MOVDconst [x]) [y]) && x<y && uint64(x)>uint64(y) -> (FlagLT_UGT)
943+
(CMPconst (MOVDconst [x]) [y]) && x>y && uint64(x)<uint64(y) -> (FlagGT_ULT)
944+
(CMPconst (MOVDconst [x]) [y]) && x>y && uint64(x)>uint64(y) -> (FlagGT_UGT)
945945
(CMPWconst (MOVDconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ)
946946
(CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT)
947947
(CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT)
@@ -1182,25 +1182,25 @@
11821182
// constant folding in *shift ops
11831183
(ADDshiftLL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)<<uint64(d))])
11841184
(ADDshiftRL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)>>uint64(d))])
1185-
(ADDshiftRA x (MOVDconst [c]) [d]) -> (ADDconst x [int64(int64(c)>>uint64(d))])
1185+
(ADDshiftRA x (MOVDconst [c]) [d]) -> (ADDconst x [c>>uint64(d)])
11861186
(SUBshiftLL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)<<uint64(d))])
11871187
(SUBshiftRL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)>>uint64(d))])
1188-
(SUBshiftRA x (MOVDconst [c]) [d]) -> (SUBconst x [int64(int64(c)>>uint64(d))])
1188+
(SUBshiftRA x (MOVDconst [c]) [d]) -> (SUBconst x [c>>uint64(d)])
11891189
(ANDshiftLL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)<<uint64(d))])
11901190
(ANDshiftRL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)>>uint64(d))])
1191-
(ANDshiftRA x (MOVDconst [c]) [d]) -> (ANDconst x [int64(int64(c)>>uint64(d))])
1191+
(ANDshiftRA x (MOVDconst [c]) [d]) -> (ANDconst x [c>>uint64(d)])
11921192
(ORshiftLL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)<<uint64(d))])
11931193
(ORshiftRL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)>>uint64(d))])
1194-
(ORshiftRA x (MOVDconst [c]) [d]) -> (ORconst x [int64(int64(c)>>uint64(d))])
1194+
(ORshiftRA x (MOVDconst [c]) [d]) -> (ORconst x [c>>uint64(d)])
11951195
(XORshiftLL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)<<uint64(d))])
11961196
(XORshiftRL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)>>uint64(d))])
1197-
(XORshiftRA x (MOVDconst [c]) [d]) -> (XORconst x [int64(int64(c)>>uint64(d))])
1197+
(XORshiftRA x (MOVDconst [c]) [d]) -> (XORconst x [c>>uint64(d)])
11981198
(BICshiftLL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)<<uint64(d))])
11991199
(BICshiftRL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)>>uint64(d))])
1200-
(BICshiftRA x (MOVDconst [c]) [d]) -> (BICconst x [int64(int64(c)>>uint64(d))])
1200+
(BICshiftRA x (MOVDconst [c]) [d]) -> (BICconst x [c>>uint64(d)])
12011201
(CMPshiftLL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)<<uint64(d))])
12021202
(CMPshiftRL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)>>uint64(d))])
1203-
(CMPshiftRA x (MOVDconst [c]) [d]) -> (CMPconst x [int64(int64(c)>>uint64(d))])
1203+
(CMPshiftRA x (MOVDconst [c]) [d]) -> (CMPconst x [c>>uint64(d)])
12041204

12051205
// simplification with *shift ops
12061206
(SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0])

‎src/cmd/compile/internal/ssa/gen/MIPS64.rules

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -304,7 +304,7 @@
304304
(Zero [s] {t} ptr mem)
305305
&& s%8 == 0 && s > 24 && s <= 8*128
306306
&& t.(*types.Type).Alignment()%8 == 0 && !config.noDuffDevice ->
307-
(DUFFZERO [8 * (128 - int64(s/8))] ptr mem)
307+
(DUFFZERO [8 * (128 - s/8)] ptr mem)
308308

309309
// large or unaligned zeroing uses a loop
310310
(Zero [s] {t} ptr mem)
@@ -618,13 +618,13 @@
618618
(SUBVconst [c] (MOVVconst [d])) -> (MOVVconst [d-c])
619619
(SUBVconst [c] (SUBVconst [d] x)) && is32Bit(-c-d) -> (ADDVconst [-c-d] x)
620620
(SUBVconst [c] (ADDVconst [d] x)) && is32Bit(-c+d) -> (ADDVconst [-c+d] x)
621-
(SLLVconst [c] (MOVVconst [d])) -> (MOVVconst [int64(d)<<uint64(c)])
621+
(SLLVconst [c] (MOVVconst [d])) -> (MOVVconst [d<<uint64(c)])
622622
(SRLVconst [c] (MOVVconst [d])) -> (MOVVconst [int64(uint64(d)>>uint64(c))])
623-
(SRAVconst [c] (MOVVconst [d])) -> (MOVVconst [int64(d)>>uint64(c)])
623+
(SRAVconst [c] (MOVVconst [d])) -> (MOVVconst [d>>uint64(c)])
624624
(Select1 (MULVU (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [c*d])
625-
(Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [int64(c)/int64(d)])
625+
(Select1 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [c/d])
626626
(Select1 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [int64(uint64(c)/uint64(d))])
627-
(Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [int64(c)%int64(d)]) // mod
627+
(Select0 (DIVV (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [c%d]) // mod
628628
(Select0 (DIVVU (MOVVconst [c]) (MOVVconst [d]))) -> (MOVVconst [int64(uint64(c)%uint64(d))]) // mod
629629
(ANDconst [c] (MOVVconst [d])) -> (MOVVconst [c&d])
630630
(ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x)
@@ -647,23 +647,23 @@
647647
(LoweredAtomicAdd64 ptr (MOVVconst [c]) mem) && is32Bit(c) -> (LoweredAtomicAddconst64 [c] ptr mem)
648648

649649
// constant comparisons
650-
(SGTconst [c] (MOVVconst [d])) && int64(c)>int64(d) -> (MOVVconst [1])
651-
(SGTconst [c] (MOVVconst [d])) && int64(c)<=int64(d) -> (MOVVconst [0])
650+
(SGTconst [c] (MOVVconst [d])) && c>d -> (MOVVconst [1])
651+
(SGTconst [c] (MOVVconst [d])) && c<=d -> (MOVVconst [0])
652652
(SGTUconst [c] (MOVVconst [d])) && uint64(c)>uint64(d) -> (MOVVconst [1])
653653
(SGTUconst [c] (MOVVconst [d])) && uint64(c)<=uint64(d) -> (MOVVconst [0])
654654

655655
// other known comparisons
656-
(SGTconst [c] (MOVBreg _)) && 0x7f < int64(c) -> (MOVVconst [1])
657-
(SGTconst [c] (MOVBreg _)) && int64(c) <= -0x80 -> (MOVVconst [0])
658-
(SGTconst [c] (MOVBUreg _)) && 0xff < int64(c) -> (MOVVconst [1])
659-
(SGTconst [c] (MOVBUreg _)) && int64(c) < 0 -> (MOVVconst [0])
656+
(SGTconst [c] (MOVBreg _)) && 0x7f < c -> (MOVVconst [1])
657+
(SGTconst [c] (MOVBreg _)) && c <= -0x80 -> (MOVVconst [0])
658+
(SGTconst [c] (MOVBUreg _)) && 0xff < c -> (MOVVconst [1])
659+
(SGTconst [c] (MOVBUreg _)) && c < 0 -> (MOVVconst [0])
660660
(SGTUconst [c] (MOVBUreg _)) && 0xff < uint64(c) -> (MOVVconst [1])
661-
(SGTconst [c] (MOVHreg _)) && 0x7fff < int64(c) -> (MOVVconst [1])
662-
(SGTconst [c] (MOVHreg _)) && int64(c) <= -0x8000 -> (MOVVconst [0])
663-
(SGTconst [c] (MOVHUreg _)) && 0xffff < int64(c) -> (MOVVconst [1])
664-
(SGTconst [c] (MOVHUreg _)) && int64(c) < 0 -> (MOVVconst [0])
661+
(SGTconst [c] (MOVHreg _)) && 0x7fff < c -> (MOVVconst [1])
662+
(SGTconst [c] (MOVHreg _)) && c <= -0x8000 -> (MOVVconst [0])
663+
(SGTconst [c] (MOVHUreg _)) && 0xffff < c -> (MOVVconst [1])
664+
(SGTconst [c] (MOVHUreg _)) && c < 0 -> (MOVVconst [0])
665665
(SGTUconst [c] (MOVHUreg _)) && 0xffff < uint64(c) -> (MOVVconst [1])
666-
(SGTconst [c] (MOVWUreg _)) && int64(c) < 0 -> (MOVVconst [0])
666+
(SGTconst [c] (MOVWUreg _)) && c < 0 -> (MOVVconst [0])
667667
(SGTconst [c] (ANDconst [m] _)) && 0 <= m && m < c -> (MOVVconst [1])
668668
(SGTUconst [c] (ANDconst [m] _)) && uint64(m) < uint64(c) -> (MOVVconst [1])
669669
(SGTconst [c] (SRLVconst _ [d])) && 0 <= c && 0 < d && d <= 63 && 1<<uint64(64-d) <= c -> (MOVVconst [1])

‎src/cmd/compile/internal/ssa/gen/PPC64.rules

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -444,15 +444,15 @@
444444
(CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) -> (FlagLT)
445445
(CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) -> (FlagGT)
446446

447-
(CMPconst (MOVDconst [x]) [y]) && int64(x)==int64(y) -> (FlagEQ)
448-
(CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) -> (FlagLT)
449-
(CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) -> (FlagGT)
447+
(CMPconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ)
448+
(CMPconst (MOVDconst [x]) [y]) && x<y -> (FlagLT)
449+
(CMPconst (MOVDconst [x]) [y]) && x>y -> (FlagGT)
450450

451451
(CMPWUconst (MOVDconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ)
452452
(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)<uint32(y) -> (FlagLT)
453453
(CMPWUconst (MOVDconst [x]) [y]) && uint32(x)>uint32(y) -> (FlagGT)
454454

455-
(CMPUconst (MOVDconst [x]) [y]) && int64(x)==int64(y) -> (FlagEQ)
455+
(CMPUconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ)
456456
(CMPUconst (MOVDconst [x]) [y]) && uint64(x)<uint64(y) -> (FlagLT)
457457
(CMPUconst (MOVDconst [x]) [y]) && uint64(x)>uint64(y) -> (FlagGT)
458458

‎src/cmd/compile/internal/ssa/rewriteARM.go

Lines changed: 4 additions & 4 deletions
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