@@ -262,10 +262,9 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
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true ); // Increment dest address
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readChannel.setTrigger (getDMAC_ID_RX ());
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readChannel.setAction (DMA_TRIGGER_ACTON_BEAT);
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- // Since all RX transfers involve a TX,
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- // I don't think this separate callback is necessary.
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- // readChannel.setCallback(dmaCallback);
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spiPtr[readChannel.getChannel ()] = this ;
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+ // Since all RX transfers involve a TX, a
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+ // separate callback here is not necessary.
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}
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}
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@@ -281,8 +280,8 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
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(void *)getDataRegister (), // Dest (SPI data register)
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0 , // Count (set later)
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DMA_BEAT_SIZE_BYTE, // Bytes/hwords/words
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- false , // Don't increment source address
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- true ); // Increment dest address
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+ true , // Increment source address
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+ false ); // Don't increment dest address
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writeChannel.setTrigger (getDMAC_ID_TX ());
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writeChannel.setAction (DMA_TRIGGER_ACTON_BEAT);
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writeChannel.setCallback (dmaCallback);
@@ -293,8 +292,8 @@ void SPIClass::transfer(const void* txbuf, void* rxbuf, size_t count,
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if (writeDescriptor && (readDescriptor || !rxbuf)) {
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static const uint8_t dum = 0xFF ; // Dummy byte for read-only xfers
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- // Initialize read descriptor dest address to rxbuf (even if NULL)
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- if (readDescriptor ) readDescriptor->DSTADDR .reg = (uint32_t )rxbuf;
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+ // Initialize read descriptor dest address to rxbuf
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+ if (rxbuf ) readDescriptor->DSTADDR .reg = (uint32_t )rxbuf;
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// If reading only, set up writeDescriptor to issue dummy bytes
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// (set SRCADDR to &dum and SRCINC to 0). Otherwise, set SRCADDR
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