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RISC-V: Add -fcf-protection=[full|branch|return] to enable zicfiss, zicfilp.
gcc/ChangeLog: * config/riscv/riscv.cc (is_zicfilp_p): New function. (is_zicfiss_p): New function. * config/riscv/riscv-zicfilp.cc: Update. * config/riscv/riscv.h: Update. * config/riscv/riscv.md: Update. * config/riscv/riscv-c.cc: Add CFI predefine marco. gcc/testsuite/ChangeLog: * c-c++-common/fcf-protection-1.c: Update. * c-c++-common/fcf-protection-2.c: Update. * c-c++-common/fcf-protection-3.c: Update. * c-c++-common/fcf-protection-4.c: Update. * c-c++-common/fcf-protection-5.c: Update. * c-c++-common/fcf-protection-6.c: Update. * c-c++-common/fcf-protection-7.c: Update. * gcc.target/riscv/ssp-1.c: Update. * gcc.target/riscv/ssp-2.c: Update. * gcc.target/riscv/zicfilp-call.c: Update. * gcc.target/riscv/interrupt-no-lpad.c: Update.
1 parent 2b3efe7 commit 59a869d

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-24
lines changed

16 files changed

+72
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‎gcc/config/riscv/riscv-c.cc‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,15 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile)
223223
/* Define architecture extension test macros. */
224224
builtin_define_with_int_value ("__riscv_arch_test", 1);
225225

226+
if (TARGET_ZICFISS && ((flag_cf_protection & CF_RETURN) == CF_RETURN))
227+
builtin_define ("__riscv_shadow_stack");
228+
229+
if (TARGET_ZICFILP && ((flag_cf_protection & CF_BRANCH) == CF_BRANCH))
230+
{
231+
builtin_define ("__riscv_landing_pad");
232+
builtin_define ("__riscv_landing_pad_unlabeled");
233+
}
234+
226235
const riscv_subset_list *subset_list = riscv_cmdline_subset_list ();
227236
if (!subset_list)
228237
return;

‎gcc/config/riscv/riscv-zicfilp.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -150,7 +150,7 @@ class pass_insert_landing_pad : public rtl_opt_pass
150150
/* opt_pass methods: */
151151
virtual bool gate (function *)
152152
{
153-
return TARGET_ZICFILP;
153+
return is_zicfilp_p ();
154154
}
155155

156156
virtual unsigned int execute (function *)

‎gcc/config/riscv/riscv.cc‎

Lines changed: 41 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -6682,7 +6682,7 @@ riscv_legitimize_call_address (rtx addr)
66826682
rtx reg = RISCV_CALL_ADDRESS_TEMP (Pmode);
66836683
riscv_emit_move (reg, addr);
66846684

6685-
if (TARGET_ZICFILP)
6685+
if (is_zicfilp_p ())
66866686
{
66876687
rtx sw_guarded = RISCV_CALL_ADDRESS_LPAD (Pmode);
66886688
emit_insn (gen_set_guarded (Pmode, reg));
@@ -6692,7 +6692,7 @@ riscv_legitimize_call_address (rtx addr)
66926692
return reg;
66936693
}
66946694

6695-
if (TARGET_ZICFILP && REG_P (addr))
6695+
if (is_zicfilp_p () && REG_P (addr))
66966696
emit_insn (gen_set_lpl (Pmode, const0_rtx));
66976697

66986698
return addr;
@@ -7508,7 +7508,7 @@ riscv_save_reg_p (unsigned int regno)
75087508
if (regno == GP_REGNUM || regno == THREAD_POINTER_REGNUM)
75097509
return false;
75107510

7511-
if (regno == RETURN_ADDR_REGNUM && TARGET_ZICFISS)
7511+
if (regno == RETURN_ADDR_REGNUM && is_zicfiss_p ())
75127512
return true;
75137513

75147514
/* We must save every register used in this function. If this is not a
@@ -10340,10 +10340,10 @@ riscv_file_end ()
1034010340
long GNU_PROPERTY_RISCV_FEATURE_1_AND = 0;
1034110341
unsigned long feature_1_and = 0;
1034210342

10343-
if (TARGET_ZICFISS)
10343+
if (is_zicfilp_p ())
1034410344
feature_1_and |= 0x1 << 0;
1034510345

10346-
if (TARGET_ZICFILP)
10346+
if (is_zicfiss_p ())
1034710347
feature_1_and |= 0x1 << 1;
1034810348

1034910349
if (feature_1_and)
@@ -10403,7 +10403,7 @@ riscv_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
1040310403
/* Mark the end of the (empty) prologue. */
1040410404
emit_note (NOTE_INSN_PROLOGUE_END);
1040510405

10406-
if (TARGET_ZICFILP)
10406+
if (is_zicfilp_p ())
1040710407
emit_insn(gen_lpad (const0_rtx));
1040810408

1040910409
/* Determine if we can use a sibcall to call FUNCTION directly. */
@@ -10630,6 +10630,20 @@ riscv_override_options_internal (struct gcc_options *opts)
1063010630

1063110631
/* Convert -march and -mrvv-vector-bits to a chunks count. */
1063210632
riscv_vector_chunks = riscv_convert_vector_chunks (opts);
10633+
10634+
if (opts->x_flag_cf_protection != CF_NONE)
10635+
{
10636+
if ((opts->x_flag_cf_protection & CF_RETURN) == CF_RETURN
10637+
&& !TARGET_ZICFISS)
10638+
error ("%<-fcf-protection%> is not compatible with this target");
10639+
10640+
if ((opts->x_flag_cf_protection & CF_BRANCH) == CF_BRANCH
10641+
&& !TARGET_ZICFILP)
10642+
error ("%<-fcf-protection%> is not compatible with this target");
10643+
10644+
opts->x_flag_cf_protection
10645+
= (cf_protection_level) (opts->x_flag_cf_protection | CF_SET);
10646+
}
1063310647
}
1063410648

1063510649
/* Implement TARGET_OPTION_OVERRIDE. */
@@ -10924,7 +10938,7 @@ riscv_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
1092410938

1092510939
/* Work out the offsets of the pointers from the start of the
1092610940
trampoline code. */
10927-
if (!TARGET_ZICFILP)
10941+
if (!is_zicfilp_p ())
1092810942
gcc_assert (ARRAY_SIZE (trampoline) * 4 == TRAMPOLINE_CODE_SIZE);
1092910943
else
1093010944
gcc_assert (ARRAY_SIZE (trampoline_cfi) * 4 == TRAMPOLINE_CODE_SIZE);
@@ -10952,7 +10966,7 @@ riscv_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
1095210966
unsigned insn_count = 0;
1095310967

1095410968
/* Insert lpad, if zicfilp is enabled. */
10955-
if (TARGET_ZICFILP)
10969+
if (is_zicfilp_p ())
1095610970
{
1095710971
unsigned HOST_WIDE_INT lpad_code;
1095810972
lpad_code = OPCODE_AUIPC | (0 << SHIFT_RD) | (lp_value << IMM_BITS);
@@ -11014,7 +11028,7 @@ riscv_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
1101411028
insn_count++;
1101511029

1101611030
/* For zicfilp only, insert lui t2, 1, because use jr t0. */
11017-
if (TARGET_ZICFILP)
11031+
if (is_zicfilp_p ())
1101811032
{
1101911033
unsigned HOST_WIDE_INT set_lpl_code;
1102011034
set_lpl_code = OPCODE_LUI
@@ -11044,7 +11058,7 @@ riscv_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
1104411058
static_chain_offset = TRAMPOLINE_CODE_SIZE;
1104511059
target_function_offset = static_chain_offset + GET_MODE_SIZE (ptr_mode);
1104611060

11047-
if (!TARGET_ZICFILP)
11061+
if (!is_zicfilp_p ())
1104811062
{
1104911063
/* auipc t2, 0
1105011064
l[wd] t0, (target_function_offset)(t2)
@@ -13959,9 +13973,25 @@ expand_reversed_crc_using_clmul (scalar_mode crc_mode, scalar_mode data_mode,
1395913973
riscv_emit_move (operands[0], gen_lowpart (crc_mode, a0));
1396013974
}
1396113975

13976+
bool is_zicfiss_p ()
13977+
{
13978+
if (TARGET_ZICFISS && (flag_cf_protection & CF_RETURN))
13979+
return true;
13980+
13981+
return false;
13982+
}
13983+
13984+
bool is_zicfilp_p ()
13985+
{
13986+
if (TARGET_ZICFILP && (flag_cf_protection & CF_BRANCH))
13987+
return true;
13988+
13989+
return false;
13990+
}
13991+
1396213992
bool need_shadow_stack_push_pop_p ()
1396313993
{
13964-
return TARGET_ZICFISS && riscv_save_return_addr_reg_p ();
13994+
return is_zicfiss_p () && riscv_save_return_addr_reg_p ();
1396513995
}
1396613996

1396713997
/* Initialize the GCC target structure. */

‎gcc/config/riscv/riscv.h‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ ASM_MISA_SPEC
191191

192192
/* Allocation boundary (in *bits*) for the code of a function. */
193193
#define FUNCTION_BOUNDARY \
194-
(((TARGET_RVC || TARGET_ZCA) && !TARGET_ZICFILP) ? 16 : 32)
194+
(((TARGET_RVC || TARGET_ZCA) && !is_zicfilp_p ()) ? 16 : 32)
195195

196196
/* The smallest supported stack boundary the calling convention supports. */
197197
#define STACK_BOUNDARY \
@@ -415,7 +415,7 @@ ASM_MISA_SPEC
415415

416416
/* Register in which static-chain is passed to a function. */
417417
#define STATIC_CHAIN_REGNUM \
418-
((TARGET_ZICFILP) ? (GP_TEMP_FIRST + 23) : (GP_TEMP_FIRST + 2))
418+
((is_zicfilp_p ()) ? (GP_TEMP_FIRST + 23) : (GP_TEMP_FIRST + 2))
419419

420420
/* Registers used as temporaries in prologue/epilogue code.
421421
@@ -827,7 +827,7 @@ extern enum riscv_cc get_riscv_cc (const rtx use);
827827

828828
/* Trampolines are a block of code followed by two pointers. */
829829

830-
#define TRAMPOLINE_CODE_SIZE ((TARGET_ZICFILP) ? 24 : 16)
830+
#define TRAMPOLINE_CODE_SIZE ((is_zicfilp_p ()) ? 24 : 16)
831831

832832
#define TRAMPOLINE_SIZE \
833833
((Pmode == SImode) \
@@ -1196,6 +1196,8 @@ extern poly_int64 riscv_v_adjust_nunits (enum machine_mode, int);
11961196
extern poly_int64 riscv_v_adjust_nunits (machine_mode, bool, int, int);
11971197
extern poly_int64 riscv_v_adjust_precision (enum machine_mode, int);
11981198
extern poly_int64 riscv_v_adjust_bytesize (enum machine_mode, int);
1199+
extern bool is_zicfiss_p ();
1200+
extern bool is_zicfilp_p ();
11991201
extern bool need_shadow_stack_push_pop_p ();
12001202
/* The number of bits and bytes in a RVV vector. */
12011203
#define BITS_PER_RISCV_VECTOR (poly_uint16 (riscv_vector_chunks * riscv_bytes_per_vector_chunk * 8))

‎gcc/config/riscv/riscv.md‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3711,11 +3711,11 @@
37113711
[(set (pc) (match_operand 0 "register_operand"))]
37123712
""
37133713
{
3714-
if (TARGET_ZICFILP)
3714+
if (is_zicfilp_p ())
37153715
emit_insn (gen_set_lpl (Pmode, const0_rtx));
37163716

37173717
operands[0] = force_reg (Pmode, operands[0]);
3718-
if (TARGET_ZICFILP)
3718+
if (is_zicfilp_p ())
37193719
emit_use (gen_rtx_REG (Pmode, T2_REGNUM));
37203720

37213721
if (Pmode == SImode)
@@ -3743,7 +3743,7 @@
37433743
gen_rtx_LABEL_REF (Pmode, operands[1]),
37443744
NULL_RTX, 0, OPTAB_DIRECT);
37453745

3746-
if (TARGET_ZICFILP)
3746+
if (is_zicfilp_p ())
37473747
{
37483748
rtx t2 = RISCV_CALL_ADDRESS_LPAD (GET_MODE (operands[0]));
37493749
emit_move_insn (t2, operands[0]);
@@ -3766,15 +3766,15 @@
37663766
(define_insn "tablejump<mode>"
37673767
[(set (pc) (match_operand:GPR 0 "register_operand" "l"))
37683768
(use (label_ref (match_operand 1 "" "")))]
3769-
"!TARGET_ZICFILP"
3769+
"!is_zicfilp_p ()"
37703770
"jr\t%0"
37713771
[(set_attr "type" "jalr")
37723772
(set_attr "mode" "none")])
37733773

37743774
(define_insn "tablejump_cfi<mode>"
37753775
[(set (pc) (reg:GPR T2_REGNUM))
37763776
(use (label_ref (match_operand 0 "")))]
3777-
"TARGET_ZICFILP"
3777+
"is_zicfilp_p ()"
37783778
"jr\tt2"
37793779
[(set_attr "type" "jalr")
37803780
(set_attr "mode" "none")])

‎gcc/testsuite/c-c++-common/fcf-protection-1.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
11
/* { dg-do compile } */
22
/* { dg-options "-fcf-protection=full" } */
3+
/* { dg-skip-if "" { "riscv*-*-*" } } */
34
/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */

‎gcc/testsuite/c-c++-common/fcf-protection-2.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
11
/* { dg-do compile } */
22
/* { dg-options "-fcf-protection=branch" } */
3+
/* { dg-skip-if "" { "riscv*-*-*" } } */
34
/* { dg-error "'-fcf-protection=branch' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */

‎gcc/testsuite/c-c++-common/fcf-protection-3.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
11
/* { dg-do compile } */
22
/* { dg-options "-fcf-protection=return" } */
3+
/* { dg-skip-if "" { "riscv*-*-*" } } */
34
/* { dg-error "'-fcf-protection=return' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */

‎gcc/testsuite/c-c++-common/fcf-protection-4.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,3 @@
11
/* { dg-do compile } */
2+
/* { dg-skip-if "" { "riscv*-*-*" } } */
23
/* { dg-options "-fcf-protection=none" } */

‎gcc/testsuite/c-c++-common/fcf-protection-5.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
11
/* { dg-do compile } */
22
/* { dg-options "-fcf-protection" } */
3+
/* { dg-skip-if "" { "riscv*-*-*" } } */
34
/* { dg-error "'-fcf-protection=full' is not supported for this target" "" { target { ! "i?86-*-* x86_64-*-*" } } 0 } */

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