@@ -48,6 +48,9 @@ extern "C" {
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#include " esp32s3/rom/spi_flash.h"
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#include " soc/efuse_reg.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
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+ #elif CONFIG_IDF_TARGET_ESP32C2
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+ #include " esp32c2/rom/spi_flash.h"
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+ #define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include " esp32c3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
@@ -366,7 +369,7 @@ FlashMode_t EspClass::getFlashChipMode(void)
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#if CONFIG_IDF_TARGET_ESP32S2
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uint32_t spi_ctrl = REG_READ (PERIPHS_SPI_FLASH_CTRL);
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#else
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- #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
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+ #if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
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uint32_t spi_ctrl = REG_READ (DR_REG_SPI0_BASE + 0x8 );
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#else
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uint32_t spi_ctrl = REG_READ (SPI_CTRL_REG (0 ));
@@ -391,38 +394,109 @@ FlashMode_t EspClass::getFlashChipMode(void)
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uint32_t EspClass::magicFlashChipSize (uint8_t byte)
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{
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+ /*
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+ FLASH_SIZES = {
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+ "1MB": 0x00,
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+ "2MB": 0x10,
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+ "4MB": 0x20,
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+ "8MB": 0x30,
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+ "16MB": 0x40,
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+ "32MB": 0x50,
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+ "64MB": 0x60,
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+ "128MB": 0x70,
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+ }
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+ */
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switch (byte & 0x0F ) {
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- case 0x0 : // 8 MBit (1MB)
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- return (1_MB);
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- case 0x1 : // 16 MBit (2MB)
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- return (2_MB);
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- case 0x2 : // 32 MBit (4MB)
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- return (4_MB);
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- case 0x3 : // 64 MBit (8MB)
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- return (8_MB);
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- case 0x4 : // 128 MBit (16MB)
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- return (16_MB);
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- default : // fail?
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+ case 0x0 : return (1_MB); // 8 MBit (1MB)
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+ case 0x1 : return (2_MB); // 16 MBit (2MB)
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+ case 0x2 : return (4_MB); // 32 MBit (4MB)
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+ case 0x3 : return (8_MB); // 64 MBit (8MB)
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+ case 0x4 : return (16_MB); // 128 MBit (16MB)
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+ case 0x5 : return (32_MB); // 256 MBit (32MB)
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+ case 0x6 : return (64_MB); // 512 MBit (64MB)
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+ case 0x7 : return (128_MB); // 1 GBit (128MB)
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+ default : // fail?
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return 0 ;
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}
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}
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uint32_t EspClass::magicFlashChipSpeed (uint8_t byte)
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{
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+ #if CONFIG_IDF_TARGET_ESP32C2
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+ /*
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+ FLASH_FREQUENCY = {
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+ "60m": 0xF,
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+ "30m": 0x0,
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+ "20m": 0x1,
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+ "15m": 0x2,
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+ }
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+ */
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+ switch (byte & 0x0F ) {
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+ case 0xF : return (60_MHz);
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+ case 0x0 : return (30_MHz);
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+ case 0x1 : return (20_MHz);
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+ case 0x2 : return (15_MHz);
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+ default : // fail?
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+ return 0 ;
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+ }
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+
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+
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+ #elif CONFIG_IDF_TARGET_ESP32C6
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+ /*
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+ FLASH_FREQUENCY = {
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+ "80m": 0x0, # workaround for wrong mspi HS div value in ROM
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+ "40m": 0x0,
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+ "20m": 0x2,
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+ }
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+ */
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+ switch (byte & 0x0F ) {
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+ case 0x0 : return (80_MHz);
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+ case 0x2 : return (20_MHz);
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+ default : // fail?
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+ return 0 ;
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+ }
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+
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+ #elif CONFIG_IDF_TARGET_ESP32H2
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+
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+ /*
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+ FLASH_FREQUENCY = {
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+ "48m": 0xF,
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+ "24m": 0x0,
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+ "16m": 0x1,
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+ "12m": 0x2,
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+ }
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+ */
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switch (byte & 0x0F ) {
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- case 0x0 : // 40 MHz
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- return (40_MHz);
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- case 0x1 : // 26 MHz
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- return (26_MHz);
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- case 0x2 : // 20 MHz
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- return (20_MHz);
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- case 0xf : // 80 MHz
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- return (80_MHz);
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- default : // fail?
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+ case 0xF : return (48_MHz);
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+ case 0x0 : return (24_MHz);
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+ case 0x1 : return (16_MHz);
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+ case 0x2 : return (12_MHz);
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+ default : // fail?
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return 0 ;
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}
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+
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+
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+ #else
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+ /*
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+ FLASH_FREQUENCY = {
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+ "80m": 0xF,
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+ "40m": 0x0,
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+ "26m": 0x1,
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+ "20m": 0x2,
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+ }
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+ */
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+ switch (byte & 0x0F ) {
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+ case 0xF : return (80_MHz);
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+ case 0x0 : return (40_MHz);
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+ case 0x1 : return (26_MHz);
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+ case 0x2 : return (20_MHz);
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+ default : // fail?
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+ return 0 ;
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+ }
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+ #endif
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}
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+
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FlashMode_t EspClass::magicFlashChipMode (uint8_t byte)
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{
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FlashMode_t mode = (FlashMode_t) byte;
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