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BMC: add support for LTL X operator
This adds support for the LTL X operator to the BMC engine.
1 parent f77b914 commit 78bc562

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5 files changed

+39
-5
lines changed

5 files changed

+39
-5
lines changed

regression/ebmc/smv/smv_ltlspec3.desc

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
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CORE
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smv_ltlspec3.smv
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--bound 2
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^EXIT=10$
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^SIGNAL=0$
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^\[main::spec1\] X X main::var::x = 1: REFUTED$
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--
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^warning: ignoring

regression/ebmc/smv/smv_ltlspec3.smv

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@@ -0,0 +1,10 @@
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MODULE main
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VAR x : 0..3;
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ASSIGN
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init(x) := 0;
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next(x) := x;
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-- we want to see a trace with three states
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LTLSPEC X X x=1

src/temporal-logic/temporal_expr.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -235,11 +235,11 @@ static inline A_exprt &to_A_expr(exprt &expr)
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return static_cast<A_exprt &>(expr);
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}
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238-
class X_exprt : public binary_predicate_exprt
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class X_exprt : public unary_predicate_exprt
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{
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public:
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explicit X_exprt(exprt op0, exprt op1)
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: binary_predicate_exprt(std::move(op0), ID_X, std::move(op1))
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explicit X_exprt(exprt op)
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: unary_predicate_exprt(ID_X, std::move(op))
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{
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}
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};

src/trans-word-level/instantiate_word_level.cpp

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,8 @@ Author: Daniel Kroening, [email protected]
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#include <verilog/sva_expr.h>
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#include <temporal-logic/temporal_expr.h>
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#include "property.h"
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#include <cassert>
@@ -235,6 +237,17 @@ exprt wl_instantiatet::instantiate_rec(exprt expr, const mp_integer &t) const
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else
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return true_exprt(); // works on NNF only
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}
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else if(expr.id()==ID_X)
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{
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const auto next = t + 1;
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if(next < no_timeframes)
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{
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return instantiate_rec(to_X_expr(expr).op(), next);
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}
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else
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return true_exprt(); // works on NNF only
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}
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else if(expr.id() == ID_sva_eventually)
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{
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const auto &eventually_expr = to_sva_eventually_expr(expr);

src/trans-word-level/property.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,8 @@ bool bmc_supports_property(const exprt &expr)
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return true;
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else if(expr.id() == ID_G)
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return true;
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else if(expr.id() == ID_X)
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return bmc_supports_property(to_X_expr(expr).op());
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else if(expr.id() == ID_sva_always)
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return true;
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else
@@ -83,12 +85,13 @@ std::map<std::size_t, exprt::operandst> property_obligations(
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messaget message(message_handler);
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// Initial state only property?
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// Initial state property?
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if(
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!is_temporal_operator(property_expr) ||
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property_expr.id() == ID_sva_cycle_delay ||
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property_expr.id() == ID_sva_nexttime ||
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property_expr.id() == ID_sva_s_nexttime)
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property_expr.id() == ID_sva_s_nexttime ||
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property_expr.id() == ID_X)
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{
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exprt tmp = instantiate(property_expr, 0, no_timeframes, ns);
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obligations[0].push_back(solver.handle(tmp));

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