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use netlist_boolbvt for the property
This enables sharing common subexpressions in the property, reducing the size of the netlist.
1 parent 11ae20a commit 57c8f8c

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3 files changed

+78
-9
lines changed

3 files changed

+78
-9
lines changed
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
CORE
22
always_with_range1.sv
33
--smv-netlist
4-
^LTLSPEC node275 & X node363 & X X node451 .*
5-
^LTLSPEC G node1155$
6-
^LTLSPEC node1243 & X node1331 & X X node1419 .*
7-
^LTLSPEC G \(\!node2066 \| X node2097\)$
4+
^LTLSPEC node275 & X node275 & X X node275 .*
5+
^LTLSPEC G node275$
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^LTLSPEC node275 & X node275 & X X node275 .*
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^LTLSPEC G \(\!node306 \| X node337\)$
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^EXIT=0$
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^SIGNAL=0$
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--
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
CORE
22
cycle_delay2.sv
33
--smv-netlist
4-
^LTLSPEC X node22 \| X X node25$
4+
^LTLSPEC X node22 \| X X node22$
55
^EXIT=0$
66
^SIGNAL=0$
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--

src/trans-netlist/trans_to_netlist.cpp

+73-4
Original file line numberDiff line numberDiff line change
@@ -17,13 +17,13 @@ Author: Daniel Kroening, [email protected]
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#include <util/std_expr.h>
1818

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#include <solvers/flattening/boolbv_width.h>
20+
#include <solvers/prop/literal_expr.h>
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#include <temporal-logic/ctl.h>
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#include <temporal-logic/ltl.h>
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#include <temporal-logic/temporal_logic.h>
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#include <verilog/sva_expr.h>
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2526
#include "aig_prop.h"
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#include "instantiate_netlist.h"
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#include "netlist.h"
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#include "netlist_boolbv.h"
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@@ -145,6 +145,8 @@ class convert_trans_to_netlistt:public messaget
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void convert_constraints();
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148+
std::optional<exprt> convert_property(const exprt &);
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void map_vars(
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const irep_idt &module,
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netlistt &dest);
@@ -328,9 +330,7 @@ void convert_trans_to_netlistt::operator()(
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// properties
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for(const auto &[id, property_expr] : properties)
330332
{
331-
auto netlist_expr_opt = netlist_property(
332-
aig_prop, dest.var_map, property_expr, ns, get_message_handler());
333-
333+
auto netlist_expr_opt = convert_property(property_expr);
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dest.properties.emplace(id, netlist_expr_opt);
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}
336336

@@ -359,6 +359,75 @@ void convert_trans_to_netlistt::operator()(
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/*******************************************************************\
361361
362+
Function: convert_trans_to_netlistt::convert_property
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364+
Inputs:
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Outputs:
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368+
Purpose:
369+
370+
\*******************************************************************/
371+
372+
std::optional<exprt>
373+
convert_trans_to_netlistt::convert_property(const exprt &expr)
374+
{
375+
if(is_temporal_operator(expr))
376+
{
377+
if(is_LTL_operator(expr) || is_CTL_operator(expr))
378+
{
379+
exprt copy = expr;
380+
for(auto &op : copy.operands())
381+
{
382+
auto op_opt = convert_property(op);
383+
if(op_opt.has_value())
384+
op = op_opt.value();
385+
else
386+
return {};
387+
}
388+
return copy;
389+
}
390+
else if(is_SVA_operator(expr))
391+
{
392+
// Try to turn into LTL
393+
auto LTL_opt = SVA_to_LTL(expr);
394+
if(LTL_opt.has_value())
395+
return convert_property(*LTL_opt);
396+
else
397+
return {};
398+
}
399+
else
400+
return {};
401+
}
402+
else if(!has_temporal_operator(expr))
403+
{
404+
auto l = solver.convert(expr);
405+
return literal_exprt{l};
406+
}
407+
else if(
408+
expr.id() == ID_and || expr.id() == ID_or || expr.id() == ID_not ||
409+
expr.id() == ID_implies || expr.id() == ID_xor || expr.id() == ID_xnor)
410+
{
411+
exprt copy = expr;
412+
for(auto &op : copy.operands())
413+
{
414+
auto op_opt = convert_property(op);
415+
if(op_opt.has_value())
416+
op = op_opt.value();
417+
else
418+
return {};
419+
}
420+
return copy;
421+
}
422+
else
423+
{
424+
// contains temporal operator, but not propositional skeleton
425+
return {};
426+
}
427+
}
428+
429+
/*******************************************************************\
430+
362431
Function: convert_trans_to_netlistt::convert_constraints
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Inputs:

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