Add jump support to STL typecheck

Adds support for the verification of jump instructions. Includes both
conditional and unconditional jumps.

Limitations: This implementation is only a rough concept and will likely
be changed in the future. CFGs prove more useful for this task than the
current concept, since they allow all parts of the PLC CPU to be
modelled implicitly, without exceptions. Currently the state of the CPU
needs to be saved as an intermediate result when encountering labels and
jumps. This is only realised for logic sequences currently. Jump
instructions in blocks that depend on the accumulator will yield to
false results!

Author: MatWise