Fix several or surpress build variable warnings.

Author: Rot127

CMakeLists.txt

@@ -1,7 +1,11 @@
 # For MSVC_RUNTIME_LIBRARY
 cmake_minimum_required(VERSION 3.15)
 
-add_compile_options(-Wno-missing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context)
+if (CMAKE_C_COMPILER_ID MATCHES "MSVC")
+    add_compile_options(/W1 /w14189 /w16268)
+else()
+    add_compile_options(-Wno-missing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context)
+endif()
 
 if(CMAKE_SOURCE_DIR STREQUAL CMAKE_BINARY_DIR)
     message(FATAL_ERROR "In-tree builds are not supported. Run CMake from a separate directory: cmake -B build")

arch/SH/SHDisassembler.c

@@ -374,7 +374,6 @@ static bool op0xx8(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
 		{-1, SH_INS_INVALID, ISA_ALL, none},
 	};
 
-	int lvl = isalevel(mode);
 	sh_insn insn = lookup_insn(list, insn_code, mode);
 	if (code & 0x0f00)
 		return MCDisassembler_Fail;
@@ -730,8 +729,6 @@ static bool op4xx5(uint16_t code, uint64_t address, MCInst *MI, cs_mode mode,
 		   sh_info *info, cs_detail *detail)
 {
 	int r = (code >> 8) & 0x0f;
-	uint16_t *regs;
-	uint8_t *count;
 	enum direction rw;
 	static const struct ri_list list[] = {
 		{0, SH_INS_ROTR, ISA_ALL, none},
@@ -1130,7 +1127,6 @@ opLDRSE(LDRE)
 static bool op##insn##_i(uint16_t code, uint64_t address, MCInst *MI, \
 			 cs_mode mode, sh_info *info, cs_detail *detail) \
 {									\
-	int dsp = code & 0x00ff;					\
 	MCInst_setOpcode(MI, SH_INS_##insn);				\
 	set_imm(info, 0, code & 0xff);					\
 	set_reg(info, SH_REG_R0, write, detail);			\
@@ -1146,7 +1142,6 @@ opImmR0(OR)
 static bool op##insn##_B(uint16_t code, uint64_t address, MCInst *MI, \
 			 cs_mode mode, sh_info *info, cs_detail *detail) \
 {									\
-	int dsp = code & 0x00ff;					\
 	MCInst_setOpcode(MI, SH_INS_##insn);				\
 	set_imm(info, 0, code & 0xff);					\
 	set_mem(info, SH_OP_MEM_GBR_R0, SH_REG_R0, 0, 8, detail);	\
@@ -1587,7 +1582,6 @@ static bool set_dsp_move_d(sh_info *info, int xy, uint16_t code, cs_mode mode, c
 	int a;
 	int d;
 	int dir;
-	int sz;
 	int op;
 	static const sh_reg base[] = {SH_REG_DSP_A0, SH_REG_DSP_X0};
 	switch (xy) {
@@ -1802,7 +1796,6 @@ static bool dsp_op_cc0_2opr(uint32_t code, sh_info *info, sh_insn insn,
 static bool decode_dsp_3op(const uint32_t code, sh_info *info,
 			   cs_detail *detail)
 {
-	int r;
 	int cc = (code >> 8) & 3;
 	int sx = (code >> 6) & 3;
 	int sy = (code >> 4) & 3;
@@ -2030,8 +2023,6 @@ static bool decode_dsp_3op(const uint32_t code, sh_info *info,
 static bool decode_dsp_p(const uint32_t code, MCInst *MI, cs_mode mode,
 			 sh_info *info, cs_detail *detail)
 {
-	bool ret;
-	
 	int dz = code & 0x0f;
 	MCInst_setOpcode(MI, SH_INS_DSP);
 	if (!decode_dsp_d(code >> 16, MI, mode, info, detail))

tests/test_sh.c

@@ -37,10 +37,6 @@ static void print_string_hex_short(unsigned char *str, size_t len)
 		printf("%02x", *c & 0xff);
 }
 
-static const char *s_access[] = {
-	"UNCHANGED", "READ", "WRITE", "READ | WRITE",
-};
-
 static void print_read_write_regs(csh handle, cs_detail *detail)
 {
 	int i;
@@ -89,7 +85,6 @@ static void print_insn_detail(csh handle, cs_insn *insn)
 
 	for (i = 0; i < sh->op_count; i++) {
 		cs_sh_op *op = &(sh->operands[i]);
-		const char *comment;
 
 		switch ((int)op->type) {
 		default: