diff --git a/cores/arduino/HardwareSPI.h b/cores/arduino/HardwareSPI.h deleted file mode 100755 index d4f590e..0000000 --- a/cores/arduino/HardwareSPI.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Copyright (c) 2010 by Cristian Maglie - * Copyright (c) 2014 by Paul Stoffregen (Transaction API) - * Copyright (c) 2014 by Matthijs Kooijman (SPISettings AVR) - * Copyright (c) 2014 by Andrew J. Kroll (atomicity fixes) - * SPI Master library for arduino. - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of either the GNU General Public License version 2 - * or the GNU Lesser General Public License version 2.1, both as - * published by the Free Software Foundation. - */ - -#ifndef _SPI_H_INCLUDED -#define _SPI_H_INCLUDED - -#include -extern SPI_HandleTypeDef hSPIx; - -#define SPIx HAL_SPI2 -#define SPIx_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() -#define SPIx_SCK_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE() -#define SPIx_MISO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() -#define SPIx_MOSI_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() -#define SPIx_NSS_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() - -#define SPIx_FORCE_RESET() __HAL_RCC_SPI2_FORCE_RESET() -#define SPIx_RELEASE_RESET() __HAL_RCC_SPI2_RELEASE_RESET() -#define SPIx_NSS_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE - -/* Definition for SPIx Pins */ -#define SPIx_SCK_PIN GPIO_PIN_3 -#define SPIx_SCK_GPIO_PORT HAL_GPIOD -#define SPIx_SCK_AF GPIO_AF5_SPI2 -#define SPIx_MISO_PIN GPIO_PIN_14 -#define SPIx_MISO_GPIO_PORT HAL_GPIOB -#define SPIx_MISO_AF GPIO_AF5_SPI2 -#define SPIx_MOSI_PIN GPIO_PIN_3 -#define SPIx_MOSI_GPIO_PORT HAL_GPIOC -#define SPIx_MOSI_AF GPIO_AF5_SPI2 - -#define SPIx_NSS_PIN GPIO_PIN_15 -#define SPIx_NSS_GPIO_PORT HAL_GPIOA -#define SPIx_NSS_AF GPIO_AF5_SPI2 - - -#ifndef LSBFIRST -#define LSBFIRST 0 -#endif -#ifndef MSBFIRST -#define MSBFIRST 1 -#endif - - - - -#define SPI_CLOCK_DIV2 SPI_BAUDRATEPRESCALER_2 -#define SPI_CLOCK_DIV4 SPI_BAUDRATEPRESCALER_4 -#define SPI_CLOCK_DIV8 SPI_BAUDRATEPRESCALER_8 -#define SPI_CLOCK_DIV16 SPI_BAUDRATEPRESCALER_16 -#define SPI_CLOCK_DIV32 SPI_BAUDRATEPRESCALER_32 -#define SPI_CLOCK_DIV64 SPI_BAUDRATEPRESCALER_64 -#define SPI_CLOCK_DIV128 SPI_BAUDRATEPRESCALER_128 -#define SPI_CLOCK_DIV256 SPI_BAUDRATEPRESCALER_256 - -#define SPI_MODE0 0x00 -#define SPI_MODE1 0x04 -#define SPI_MODE2 0x08 -#define SPI_MODE3 0x0C - -#define SPI_LAST 0 -#define SPI_CONTINUE 1 - - -class SPISettings { -public: - SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) { - init_AlwaysInline(clock, bitOrder, dataMode); - } - SPISettings() { - init_AlwaysInline(SPI_CLOCK_DIV4, MSBFIRST, SPI_MODE0); - } -private: - void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) - __attribute__((__always_inline__)) { - - /* Select the Bit Order */ - if(bitOrder == LSBFIRST) { - bitOrder = SPI_FIRSTBIT_LSB; - } - else { - bitOrder = SPI_FIRSTBIT_MSB; - } - hSPIx.Init.FirstBit = bitOrder; - - /* Select the SPI Communication Mode */ - if(dataMode == SPI_MODE0) { - hSPIx.Init.CLKPhase = SPI_PHASE_1EDGE; - hSPIx.Init.CLKPolarity = SPI_POLARITY_LOW; - } - else if(dataMode == SPI_MODE1) { - hSPIx.Init.CLKPhase = SPI_PHASE_2EDGE; - hSPIx.Init.CLKPolarity = SPI_POLARITY_LOW; - } - else if(dataMode == SPI_MODE2) { - hSPIx.Init.CLKPhase = SPI_PHASE_1EDGE; - hSPIx.Init.CLKPolarity = SPI_POLARITY_HIGH; - } - else { - hSPIx.Init.CLKPhase = SPI_PHASE_2EDGE; - hSPIx.Init.CLKPolarity = SPI_POLARITY_HIGH; - } - - /* Select the Clock Divider */ - hSPIx.Init.BaudRatePrescaler = clock; - - /* Initialize the SPIx */ - HAL_SPI_Init(&hSPIx); - } - - friend class SPIClass; -}; - - -class SPIClass { -public: - /* Initialize the SPI peripheral */ - static void begin(); - - /* Initialize the SPI peripheral and SS pin */ - static void begin(uint8_t slaveSelectPin); - - /* Initialize the SPI peripheral with settings */ - static void beginTransaction(SPISettings settings); - - /* Initialize the SPI peripheral */ - static void endTransaction(); - - /* Begin the transfer */ - static uint8_t transfer(uint8_t data); - static uint16_t transfer16(uint16_t data); - static void transfer(void *buf, size_t count); - static void transfer(uint8_t slaveSelectPin, uint8_t val, uint8_t transferMode); - - /* End the transfer */ - static void end(); - - static void end(uint8_t slaveSelectPin); - - /* Set Bit Order */ - static void setBitOrder(uint8_t bitOrder); - - /* Set Clock Divider */ - static void setClockDivider(uint8_t clockDiv); - - /* Set Communication Mode */ - static void setDataMode(uint8_t dataMode); - -}; - -extern SPIClass SPI; -//extern SPISettings SPISettings(SPI_CLOCK_DIV4, MSBFIRST, SPI_MODE0); -#endif diff --git a/cores/arduino/HardwareTimer.cpp b/cores/arduino/HardwareTimer.cpp index a99e992..8ca22fb 100755 --- a/cores/arduino/HardwareTimer.cpp +++ b/cores/arduino/HardwareTimer.cpp @@ -128,6 +128,10 @@ void HardwareTimer::attachInterrupt(int channel, voidFuncPtr handler) { timer_attach_interrupt(this->dev, (uint8)channel, handler); } +void HardwareTimer::toneAttachInterrupt(int channel, voidFuncPtr handler) { + tone_attach_interrupt(this->dev, (uint8)channel, handler); +} + void HardwareTimer::detachInterrupt(int channel) { timer_detach_interrupt(this->dev, (uint8)channel); } diff --git a/cores/arduino/HardwareTimer.h b/cores/arduino/HardwareTimer.h index 59eec3d..b1e2b89 100755 --- a/cores/arduino/HardwareTimer.h +++ b/cores/arduino/HardwareTimer.h @@ -192,6 +192,7 @@ class HardwareTimer { * @see voidFuncPtr */ void attachInterrupt(int channel, voidFuncPtr handler); + void toneAttachInterrupt(int channel, voidFuncPtr handler); // alfran : used for tone /** * @brief Remove the interrupt handler attached to the given diff --git a/cores/arduino/HardwareSPI.cpp b/cores/arduino/SPI.cpp similarity index 99% rename from cores/arduino/HardwareSPI.cpp rename to cores/arduino/SPI.cpp index f404e99..d63d246 100755 --- a/cores/arduino/HardwareSPI.cpp +++ b/cores/arduino/SPI.cpp @@ -24,7 +24,7 @@ extern "C" { } -#include "HardwareSPI.h" +#include "SPI.h" SPIClass SPI; SPI_HandleTypeDef hSPIx; diff --git a/cores/arduino/Tone.cpp b/cores/arduino/Tone.cpp index 0e1534a..d4f5e9e 100755 --- a/cores/arduino/Tone.cpp +++ b/cores/arduino/Tone.cpp @@ -40,7 +40,7 @@ Version Modified By Date Comments volatile static int toggle_count=0; static int tone_pin; -int timer_CH = 2; +int timer_CH = 5; HardwareTimer timer(timer_CH); @@ -55,7 +55,7 @@ void tone(uint8_t pin, unsigned int frequency, unsigned long duration) timer.setOverflow(1000000/frequency/4); timer.setMode(TIMER_CH1, TIMER_OUTPUT_COMPARE); timer.setCompare(TIMER_CH1, 1); // Interrupt 1 count after each update - timer.attachInterrupt(TIMER_CH1, handler_tone); + timer.toneAttachInterrupt(TIMER_CH1, handler_tone); timer.refresh(); // start it up timer.resume(); @@ -66,17 +66,23 @@ void tone(uint8_t pin, unsigned int frequency, unsigned long duration) void noTone(uint8_t pin) { timer.pause(); - gpio_write_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_bit, 0); - -return; + timer.setPrescaleFactor(1); + timer.setOverflow(0xFFFF); + timer.setMode(TIMER_CH1, TIMER_PWM); + timer.refresh(); + timer.resume(); + gpio_write_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_bit, 0); + pinMode(pin,INPUT); //to fix dfu issue + + return; } - +/* void set_timer(int ch) { HardwareTimer timer(ch); timer_CH = ch; } - +*/ void handler_tone(void) { if (toggle_count != 0){ diff --git a/cores/arduino/pwm.cpp b/cores/arduino/pwm.cpp index 6f268b8..610f332 100755 --- a/cores/arduino/pwm.cpp +++ b/cores/arduino/pwm.cpp @@ -67,7 +67,7 @@ void analogWrite(uint8 pin, uint16 passed_val) timer_dev *dev = PIN_MAP[pin].timer_device; if (pin >= GPIO_PINS || dev == NULL || dev->type == TIMER_BASIC) { - return; + return; } if (PIN_MAP[pin].alternate_function != AFx) { @@ -76,6 +76,7 @@ void analogWrite(uint8 pin, uint16 passed_val) timer_set_compare(dev, PIN_MAP[pin].timer_channel, duty_cycle); timer_cc_enable(dev, PIN_MAP[pin].timer_channel); gpio_set_mode(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_bit, GPIO_AF_OUTPUT_PP); + } } diff --git a/cores/arduino/spi.c b/cores/arduino/spi.c deleted file mode 100755 index 2fff1e4..0000000 --- a/cores/arduino/spi.c +++ /dev/null @@ -1,164 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/spi.c - * @author Marti Bolivar - * @brief Serial Peripheral Interface (SPI) support. - * Currently, there is no Integrated Interchip Sound (I2S) support. - */ - -#include -#include - -static void spi_reconfigure(spi_dev *dev, uint32 cr1_config); - -/* - * SPI convenience routines - */ - -/** - * @brief Initialize and reset a SPI device. - * @param dev Device to initialize and reset. - */ -void spi_init(spi_dev *dev) { - rcc_clk_enable(dev->clk_id); - rcc_reset_dev(dev->clk_id); -} - -/** - * @brief Configure and enable a SPI device as bus master. - * - * The device's peripheral will be disabled before being reconfigured. - * - * @param dev Device to configure as bus master - * @param baud Bus baud rate - * @param mode SPI mode - * @param flags Logical OR of spi_cfg_flag values. - * @see spi_cfg_flag - */ -void spi_master_enable(spi_dev *dev, - spi_baud_rate baud, - spi_mode mode, - uint32 flags) { - spi_reconfigure(dev, baud | flags | SPI_CR1_MSTR | mode); -} - -/** - * @brief Configure and enable a SPI device as a bus slave. - * - * The device's peripheral will be disabled before being reconfigured. - * - * @param dev Device to configure as a bus slave - * @param mode SPI mode - * @param flags Logical OR of spi_cfg_flag values. - * @see spi_cfg_flag - */ -void spi_slave_enable(spi_dev *dev, spi_mode mode, uint32 flags) { - spi_reconfigure(dev, flags | mode); -} - -/** - * @brief Nonblocking SPI transmit. - * @param dev SPI port to use for transmission - * @param buf Buffer to transmit. The sizeof buf's elements are - * inferred from dev's data frame format (i.e., are - * correctly treated as 8-bit or 16-bit quantities). - * @param len Maximum number of elements to transmit. - * @return Number of elements transmitted. - */ -uint32 spi_tx(spi_dev *dev, const void *buf, uint32 len) { - uint32 txed = 0; - uint8 byte_frame = spi_dff(dev) == SPI_DFF_8_BIT; - while (spi_is_tx_empty(dev) && (txed < len)) { - if (byte_frame) { - dev->regs->DR = ((const uint8*)buf)[txed++]; - } else { - dev->regs->DR = ((const uint16*)buf)[txed++]; - } - } - return txed; -} - -/** - * @brief Enable a SPI peripheral - * @param dev Device to enable - */ -void spi_peripheral_enable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR1, SPI_CR1_SPE_BIT, 1); -} - -/** - * @brief Disable a SPI peripheral - * @param dev Device to disable - */ -void spi_peripheral_disable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR1, SPI_CR1_SPE_BIT, 0); -} - -/** - * @brief Enable DMA requests whenever the transmit buffer is empty - * @param dev SPI device on which to enable TX DMA requests - */ -void spi_tx_dma_enable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR2, SPI_CR2_TXDMAEN_BIT, 1); -} - -/** - * @brief Disable DMA requests whenever the transmit buffer is empty - * @param dev SPI device on which to disable TX DMA requests - */ -void spi_tx_dma_disable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR2, SPI_CR2_TXDMAEN_BIT, 0); -} - -/** - * @brief Enable DMA requests whenever the receive buffer is empty - * @param dev SPI device on which to enable RX DMA requests - */ -void spi_rx_dma_enable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR2, SPI_CR2_RXDMAEN_BIT, 1); -} - -/** - * @brief Disable DMA requests whenever the receive buffer is empty - * @param dev SPI device on which to disable RX DMA requests - */ -void spi_rx_dma_disable(spi_dev *dev) { - bb_peri_set_bit(&dev->regs->CR2, SPI_CR2_RXDMAEN_BIT, 0); -} - -/* - * SPI auxiliary routines - */ - -static void spi_reconfigure(spi_dev *dev, uint32 cr1_config) { - spi_irq_disable(dev, SPI_INTERRUPTS_ALL); - spi_peripheral_disable(dev); - dev->regs->CR1 = cr1_config; - spi_peripheral_enable(dev); -} diff --git a/cores/arduino/spi.h b/cores/arduino/spi.h index 52f089e..d4f590e 100755 --- a/cores/arduino/spi.h +++ b/cores/arduino/spi.h @@ -1,471 +1,163 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/include/libmaple/spi.h - * @author Marti Bolivar - * @brief Serial Peripheral Interface (SPI) and Integrated - * Interchip Sound (I2S) peripheral support. - * - * I2S support is currently limited to register maps and bit definitions. - */ - -#ifndef _SPI_H_ -#define _SPI_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include "spiF4.h" - - -/* - * Register maps - */ - -/** SPI register map type. */ -typedef struct spi_reg_map { - __io uint32 CR1; /**< Control register 1 */ - __io uint32 CR2; /**< Control register 2 */ - __io uint32 SR; /**< Status register */ - __io uint32 DR; /**< Data register */ - __io uint32 CRCPR; /**< CRC polynomial register */ - __io uint32 RXCRCR; /**< RX CRC register */ - __io uint32 TXCRCR; /**< TX CRC register */ - __io uint32 I2SCFGR; /**< I2S configuration register */ - __io uint32 I2SPR; /**< I2S prescaler register */ -} spi_reg_map; - -/* - * Register bit definitions - */ - -/* Control register 1 */ - -#define SPI_CR1_BIDIMODE_BIT 15 -#define SPI_CR1_BIDIOE_BIT 14 -#define SPI_CR1_CRCEN_BIT 13 -#define SPI_CR1_CRCNEXT_BIT 12 -#define SPI_CR1_DFF_BIT 11 -#define SPI_CR1_RXONLY_BIT 10 -#define SPI_CR1_SSM_BIT 9 -#define SPI_CR1_SSI_BIT 8 -#define SPI_CR1_LSBFIRST_BIT 7 -#define SPI_CR1_SPE_BIT 6 -#define SPI_CR1_MSTR_BIT 2 -#define SPI_CR1_CPOL_BIT 1 -#define SPI_CR1_CPHA_BIT 0 - -#define SPI_CR1_BIDIMODE (1U << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIMODE_2_LINE (0x0 << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIMODE_1_LINE (0x1 << SPI_CR1_BIDIMODE_BIT) -#define SPI_CR1_BIDIOE (1U << SPI_CR1_BIDIOE_BIT) -#define SPI_CR1_CRCEN (1U << SPI_CR1_CRCEN_BIT) -#define SPI_CR1_CRCNEXT (1U << SPI_CR1_CRCNEXT_BIT) -#define SPI_CR1_DFF (1U << SPI_CR1_DFF_BIT) -#define SPI_CR1_DFF_8_BIT (0x0 << SPI_CR1_DFF_BIT) -#define SPI_CR1_DFF_16_BIT (0x1 << SPI_CR1_DFF_BIT) -#define SPI_CR1_RXONLY (1U << SPI_CR1_RXONLY_BIT) -#define SPI_CR1_SSM (1U << SPI_CR1_SSM_BIT) -#define SPI_CR1_SSI (1U << SPI_CR1_SSI_BIT) -#define SPI_CR1_LSBFIRST (1U << SPI_CR1_LSBFIRST_BIT) -#define SPI_CR1_SPE (1U << SPI_CR1_SPE_BIT) -#define SPI_CR1_BR (0x7 << 3) -#define SPI_CR1_BR_PCLK_DIV_2 (0x0 << 3) -#define SPI_CR1_BR_PCLK_DIV_4 (0x1 << 3) -#define SPI_CR1_BR_PCLK_DIV_8 (0x2 << 3) -#define SPI_CR1_BR_PCLK_DIV_16 (0x3 << 3) -#define SPI_CR1_BR_PCLK_DIV_32 (0x4 << 3) -#define SPI_CR1_BR_PCLK_DIV_64 (0x5 << 3) -#define SPI_CR1_BR_PCLK_DIV_128 (0x6 << 3) -#define SPI_CR1_BR_PCLK_DIV_256 (0x7 << 3) -#define SPI_CR1_MSTR (1U << SPI_CR1_MSTR_BIT) -#define SPI_CR1_CPOL (1U << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPOL_LOW (0x0 << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPOL_HIGH (0x1 << SPI_CR1_CPOL_BIT) -#define SPI_CR1_CPHA (1U << SPI_CR1_CPHA_BIT) - -/* Control register 2 */ - -#define SPI_CR2_TXEIE_BIT 7 -#define SPI_CR2_RXNEIE_BIT 6 -#define SPI_CR2_ERRIE_BIT 5 -#define SPI_CR2_SSOE_BIT 2 -#define SPI_CR2_TXDMAEN_BIT 1 -#define SPI_CR2_RXDMAEN_BIT 0 - -#define SPI_CR2_TXEIE (1U << SPI_CR2_TXEIE_BIT) -#define SPI_CR2_RXNEIE (1U << SPI_CR2_RXNEIE_BIT) -#define SPI_CR2_ERRIE (1U << SPI_CR2_ERRIE_BIT) -#define SPI_CR2_SSOE (1U << SPI_CR2_SSOE_BIT) -#define SPI_CR2_TXDMAEN (1U << SPI_CR2_TXDMAEN_BIT) -#define SPI_CR2_RXDMAEN (1U << SPI_CR2_RXDMAEN_BIT) - -/* Status register */ - -#define SPI_SR_BSY_BIT 7 -#define SPI_SR_OVR_BIT 6 -#define SPI_SR_MODF_BIT 5 -#define SPI_SR_CRCERR_BIT 4 -#define SPI_SR_UDR_BIT 3 -#define SPI_SR_CHSIDE_BIT 2 -#define SPI_SR_TXE_BIT 1 -#define SPI_SR_RXNE_BIT 0 - -#define SPI_SR_BSY (1U << SPI_SR_BSY_BIT) -#define SPI_SR_OVR (1U << SPI_SR_OVR_BIT) -#define SPI_SR_MODF (1U << SPI_SR_MODF_BIT) -#define SPI_SR_CRCERR (1U << SPI_SR_CRCERR_BIT) -#define SPI_SR_UDR (1U << SPI_SR_UDR_BIT) -#define SPI_SR_CHSIDE (1U << SPI_SR_CHSIDE_BIT) -#define SPI_SR_CHSIDE_LEFT (0x0 << SPI_SR_CHSIDE_BIT) -#define SPI_SR_CHSIDE_RIGHT (0x1 << SPI_SR_CHSIDE_BIT) -#define SPI_SR_TXE (1U << SPI_SR_TXE_BIT) -#define SPI_SR_RXNE (1U << SPI_SR_RXNE_BIT) - -/* I2S configuration register */ - -#define SPI_I2SCFGR_I2SMOD_BIT 11 -#define SPI_I2SCFGR_I2SE_BIT 10 -#define SPI_I2SCFGR_PCMSYNC_BIT 7 -#define SPI_I2SCFGR_CKPOL_BIT 3 -#define SPI_I2SCFGR_CHLEN_BIT 0 - -#define SPI_I2SCFGR_I2SMOD (1U << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SMOD_SPI (0x0 << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SMOD_I2S (0x1 << SPI_I2SCFGR_I2SMOD_BIT) -#define SPI_I2SCFGR_I2SE (1U << SPI_I2SCFGR_I2SE_BIT) -#define SPI_I2SCFGR_I2SCFG (0x3 << 8) -#define SPI_I2SCFGR_I2SCFG_SLAVE_TX (0x0 << 8) -#define SPI_I2SCFGR_I2SCFG_SLAVE_RX (0x1 << 8) -#define SPI_I2SCFGR_I2SCFG_MASTER_TX (0x2 << 8) -#define SPI_I2SCFGR_I2SCFG_MASTER_RX (0x3 << 8) -#define SPI_I2SCFGR_PCMSYNC (1U << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_PCMSYNC_SHORT (0x0 << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_PCMSYNC_LONG (0x1 << SPI_I2SCFGR_PCMSYNC_BIT) -#define SPI_I2SCFGR_I2SSTD (0x3 << 4) -#define SPI_I2SCFGR_I2SSTD_PHILLIPS (0x0 << 4) -#define SPI_I2SCFGR_I2SSTD_MSB (0x1 << 4) -#define SPI_I2SCFGR_I2SSTD_LSB (0x2 << 4) -#define SPI_I2SCFGR_I2SSTD_PCM (0x3 << 4) -#define SPI_I2SCFGR_CKPOL (1U << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_CKPOL_LOW (0x0 << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_CKPOL_HIGH (0x1 << SPI_I2SCFGR_CKPOL_BIT) -#define SPI_I2SCFGR_DATLEN (0x3 << 1) -#define SPI_I2SCFGR_DATLEN_16_BIT (0x0 << 1) -#define SPI_I2SCFGR_DATLEN_24_BIT (0x1 << 1) -#define SPI_I2SCFGR_DATLEN_32_BIT (0x2 << 1) -#define SPI_I2SCFGR_CHLEN (1U << SPI_I2SCFGR_CHLEN_BIT) -#define SPI_I2SCFGR_CHLEN_16_BIT (0x0 << SPI_I2SCFGR_CHLEN_BIT) -#define SPI_I2SCFGR_CHLEN_32_BIT (0x1 << SPI_I2SCFGR_CHLEN_BIT) - -/* I2S prescaler register */ - -#define SPI_I2SPR_MCKOE_BIT 9 -#define SPI_I2SPR_ODD_BIT 8 - -#define SPI_I2SPR_MCKOE (1U << SPI_I2SPR_MCKOE_BIT) -#define SPI_I2SPR_ODD (1U << SPI_I2SPR_ODD_BIT) -#define SPI_I2SPR_I2SDIV 0xFF - /* - * Devices - */ - -/** SPI device type */ -typedef struct spi_dev { - spi_reg_map *regs; /**< Register map */ - rcc_clk_id clk_id; /**< RCC clock information */ - nvic_irq_num irq_num; /**< NVIC interrupt number */ -} spi_dev; - -/* - * SPI Convenience functions - */ - -void spi_init(spi_dev *dev); - -struct gpio_dev; -/** - * @brief Configure GPIO bit modes for use as a SPI port's pins. + * Copyright (c) 2010 by Cristian Maglie + * Copyright (c) 2014 by Paul Stoffregen (Transaction API) + * Copyright (c) 2014 by Matthijs Kooijman (SPISettings AVR) + * Copyright (c) 2014 by Andrew J. Kroll (atomicity fixes) + * SPI Master library for arduino. * - * @param dev SPI device - * @param as_master If true, configure as bus master; otherwise, as slave. - * @param nss_dev NSS pin's GPIO device - * @param nss_bit NSS pin's GPIO bit on nss_dev - * @param comm_dev SCK, MISO, MOSI pins' GPIO device - * @param sck_bit SCK pin's GPIO bit on comm_dev - * @param miso_bit MISO pin's GPIO bit on comm_dev - * @param mosi_bit MOSI pin's GPIO bit on comm_dev - */ -extern void spi_config_gpios(spi_dev *dev, - uint8 as_master, - struct gpio_dev *nss_dev, - uint8 nss_bit, - struct gpio_dev *comm_dev, - uint8 sck_bit, - uint8 miso_bit, - uint8 mosi_bit); - -/** - * @brief SPI mode configuration. - * - * A SPI mode determines a combination of the idle state of the clock - * line (the clock polarity, or "CPOL"), and which clock edge triggers - * data capture (the clock phase, or "CPHA"). - */ -typedef enum spi_mode { - /** Clock idles low, data captured on rising edge (first transition) */ - SPI_MODE_LOW_RISING = 0, - /** Clock idles low, data captured on falling edge (second transition) */ - SPI_MODE_LOW_FALLING = 1, - /** Clock idles high, data captured on falling edge (first transition) */ - SPI_MODE_HIGH_FALLING = 2, - /** Clock idles high, data captured on rising edge (second transition) */ - SPI_MODE_HIGH_RISING = 3, - - SPI_MODE_0 = SPI_MODE_LOW_RISING, /**< Same as SPI_MODE_LOW_RISING */ - SPI_MODE_1 = SPI_MODE_LOW_FALLING, /**< Same as SPI_MODE_LOW_FALLING */ - SPI_MODE_2 = SPI_MODE_HIGH_FALLING, /**< Same as SPI_MODE_HIGH_FALLING */ - SPI_MODE_3 = SPI_MODE_HIGH_RISING, /**< Same as SPI_MODE_HIGH_RISING */ -} spi_mode; - -/** - * @brief SPI baud rate configuration, as a divisor of f_PCLK, the - * PCLK clock frequency. - */ -typedef enum spi_baud_rate { - SPI_BAUD_PCLK_DIV_2 = SPI_CR1_BR_PCLK_DIV_2, /**< f_PCLK/2 */ - SPI_BAUD_PCLK_DIV_4 = SPI_CR1_BR_PCLK_DIV_4, /**< f_PCLK/4 */ - SPI_BAUD_PCLK_DIV_8 = SPI_CR1_BR_PCLK_DIV_8, /**< f_PCLK/8 */ - SPI_BAUD_PCLK_DIV_16 = SPI_CR1_BR_PCLK_DIV_16, /**< f_PCLK/16 */ - SPI_BAUD_PCLK_DIV_32 = SPI_CR1_BR_PCLK_DIV_32, /**< f_PCLK/32 */ - SPI_BAUD_PCLK_DIV_64 = SPI_CR1_BR_PCLK_DIV_64, /**< f_PCLK/64 */ - SPI_BAUD_PCLK_DIV_128 = SPI_CR1_BR_PCLK_DIV_128, /**< f_PCLK/128 */ - SPI_BAUD_PCLK_DIV_256 = SPI_CR1_BR_PCLK_DIV_256, /**< f_PCLK/256 */ -} spi_baud_rate; - -/** - * @brief SPI initialization flags. - * @see spi_master_enable() - * @see spi_slave_enable() - */ -typedef enum spi_cfg_flag { - SPI_BIDIMODE = SPI_CR1_BIDIMODE, /**< Bidirectional mode enable */ - SPI_BIDIOE = SPI_CR1_BIDIOE, /**< Output enable in bidirectional - mode */ - SPI_CRCEN = SPI_CR1_CRCEN, /**< Cyclic redundancy check (CRC) - enable */ - SPI_DFF_8_BIT = SPI_CR1_DFF_8_BIT, /**< 8-bit data frame format (this is - the default) */ - SPI_DFF_16_BIT = SPI_CR1_DFF_16_BIT, /**< 16-bit data frame format */ - SPI_RX_ONLY = SPI_CR1_RXONLY, /**< Receive only */ - SPI_SW_SLAVE = SPI_CR1_SSM, /**< Software slave management */ - SPI_SOFT_SS = SPI_CR1_SSI, /**< Software (internal) slave - select. This flag only has an - effect when used in combination - with SPI_SW_SLAVE. */ - SPI_FRAME_LSB = SPI_CR1_LSBFIRST, /**< LSB-first (little-endian) frame - format */ - SPI_FRAME_MSB = 0, /**< MSB-first (big-endian) frame - format (this is the default) */ -} spi_cfg_flag; - -void spi_master_enable(spi_dev *dev, - spi_baud_rate baud, - spi_mode mode, - uint32 flags); - -void spi_slave_enable(spi_dev *dev, - spi_mode mode, - uint32 flags); - -uint32 spi_tx(spi_dev *dev, const void *buf, uint32 len); - -/** - * @brief Call a function on each SPI port - * @param fn Function to call. - */ -extern void spi_foreach(void (*fn)(spi_dev*)); - -void spi_peripheral_enable(spi_dev *dev); -void spi_peripheral_disable(spi_dev *dev); - -void spi_tx_dma_enable(spi_dev *dev); -void spi_tx_dma_disable(spi_dev *dev); - -void spi_rx_dma_enable(spi_dev *dev); -void spi_rx_dma_disable(spi_dev *dev); - -/** - * @brief Determine if a SPI peripheral is enabled. - * @param dev SPI device - * @return True, if and only if dev's peripheral is enabled. - */ -static inline uint8 spi_is_enabled(spi_dev *dev) { - return dev->regs->CR1 & SPI_CR1_SPE_BIT; -} - -/** - * @brief Disable all SPI peripherals - */ -static inline void spi_peripheral_disable_all(void) { - spi_foreach(spi_peripheral_disable); -} - -/** Available SPI interrupts */ -typedef enum spi_interrupt { - SPI_TXE_INTERRUPT = SPI_CR2_TXEIE, /**< TX buffer empty interrupt */ - SPI_RXNE_INTERRUPT = SPI_CR2_RXNEIE, /**< RX buffer not empty interrupt */ - SPI_ERR_INTERRUPT = SPI_CR2_ERRIE /**< - * Error interrupt (CRC, overrun, - * and mode fault errors for SPI; - * underrun, overrun errors for I2S) - */ -} spi_interrupt; - -/** - * @brief Mask for all spi_interrupt values - * @see spi_interrupt - */ -#define SPI_INTERRUPTS_ALL (SPI_TXE_INTERRUPT | \ - SPI_RXNE_INTERRUPT | \ - SPI_ERR_INTERRUPT) - -/** - * @brief Enable SPI interrupt requests - * @param dev SPI device - * @param interrupt_flags Bitwise OR of spi_interrupt values to enable - * @see spi_interrupt - */ -static inline void spi_irq_enable(spi_dev *dev, uint32 interrupt_flags) { - dev->regs->CR2 |= interrupt_flags; - nvic_irq_enable(dev->irq_num); -} - -/** - * @brief Disable SPI interrupt requests - * @param dev SPI device - * @param interrupt_flags Bitwise OR of spi_interrupt values to disable - * @see spi_interrupt - */ -static inline void spi_irq_disable(spi_dev *dev, uint32 interrupt_flags) { - dev->regs->CR2 &= ~interrupt_flags; -} - -/** - * @brief Get the data frame format flags with which a SPI port is - * configured. - * @param dev SPI device whose data frame format to get. - * @return SPI_DFF_8_BIT, if dev has an 8-bit data frame format. - * Otherwise, SPI_DFF_16_BIT. - */ -static inline spi_cfg_flag spi_dff(spi_dev *dev) { - return ((dev->regs->CR1 & SPI_CR1_DFF) == SPI_CR1_DFF_8_BIT ? - SPI_DFF_8_BIT : - SPI_DFF_16_BIT); -} - -/** - * @brief Determine whether the device's peripheral receive (RX) - * register is empty. - * @param dev SPI device - * @return true, iff dev's RX register is empty. - */ -static inline uint8 spi_is_rx_nonempty(spi_dev *dev) { - return dev->regs->SR & SPI_SR_RXNE; -} - -/** - * @brief Retrieve the contents of the device's peripheral receive - * (RX) register. - * - * You may only call this function when the RX register is nonempty. - * Calling this function clears the contents of the RX register. - * - * @param dev SPI device - * @return Contents of dev's peripheral RX register - * @see spi_is_rx_reg_nonempty() - */ -static inline uint16 spi_rx_reg(spi_dev *dev) { - return (uint16)dev->regs->DR; -} - -/** - * @brief Determine whether the device's peripheral transmit (TX) - * register is empty. - * @param dev SPI device - * @return true, iff dev's TX register is empty. - */ -static inline uint8 spi_is_tx_empty(spi_dev *dev) { - return dev->regs->SR & SPI_SR_TXE; -} + * This file is free software; you can redistribute it and/or modify + * it under the terms of either the GNU General Public License version 2 + * or the GNU Lesser General Public License version 2.1, both as + * published by the Free Software Foundation. + */ + +#ifndef _SPI_H_INCLUDED +#define _SPI_H_INCLUDED + +#include +extern SPI_HandleTypeDef hSPIx; + +#define SPIx HAL_SPI2 +#define SPIx_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE() +#define SPIx_SCK_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE() +#define SPIx_MISO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() +#define SPIx_MOSI_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() +#define SPIx_NSS_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + +#define SPIx_FORCE_RESET() __HAL_RCC_SPI2_FORCE_RESET() +#define SPIx_RELEASE_RESET() __HAL_RCC_SPI2_RELEASE_RESET() +#define SPIx_NSS_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE + +/* Definition for SPIx Pins */ +#define SPIx_SCK_PIN GPIO_PIN_3 +#define SPIx_SCK_GPIO_PORT HAL_GPIOD +#define SPIx_SCK_AF GPIO_AF5_SPI2 +#define SPIx_MISO_PIN GPIO_PIN_14 +#define SPIx_MISO_GPIO_PORT HAL_GPIOB +#define SPIx_MISO_AF GPIO_AF5_SPI2 +#define SPIx_MOSI_PIN GPIO_PIN_3 +#define SPIx_MOSI_GPIO_PORT HAL_GPIOC +#define SPIx_MOSI_AF GPIO_AF5_SPI2 + +#define SPIx_NSS_PIN GPIO_PIN_15 +#define SPIx_NSS_GPIO_PORT HAL_GPIOA +#define SPIx_NSS_AF GPIO_AF5_SPI2 + + +#ifndef LSBFIRST +#define LSBFIRST 0 +#endif +#ifndef MSBFIRST +#define MSBFIRST 1 +#endif -/** - * @brief Load a value into the device's peripheral transmit (TX) register. - * - * You may only call this function when the TX register is empty. - * Calling this function loads val into the peripheral's TX register. - * If the device is properly configured, this will initiate a - * transmission, the completion of which will cause the TX register to - * be empty again. - * - * @param dev SPI device - * @param val Value to load into the TX register. If the SPI data - * frame format is 8 bit, the value must be right-aligned. - * @see spi_is_tx_reg_empty() - * @see spi_init() - * @see spi_master_enable() - * @see spi_slave_enable() - */ -static inline void spi_tx_reg(spi_dev *dev, uint16 val) { - dev->regs->DR = val; -} - -/** - * @brief Determine whether the device's peripheral busy (SPI_SR_BSY) - * flag is set. - * @param dev SPI device - * @return true, iff dev's BSY flag is set. - */ -static inline uint8 spi_is_busy(spi_dev *dev) { - return dev->regs->SR & SPI_SR_BSY; -} -/* - * I2S convenience functions (TODO) - */ -#ifdef __cplusplus -} -#endif +#define SPI_CLOCK_DIV2 SPI_BAUDRATEPRESCALER_2 +#define SPI_CLOCK_DIV4 SPI_BAUDRATEPRESCALER_4 +#define SPI_CLOCK_DIV8 SPI_BAUDRATEPRESCALER_8 +#define SPI_CLOCK_DIV16 SPI_BAUDRATEPRESCALER_16 +#define SPI_CLOCK_DIV32 SPI_BAUDRATEPRESCALER_32 +#define SPI_CLOCK_DIV64 SPI_BAUDRATEPRESCALER_64 +#define SPI_CLOCK_DIV128 SPI_BAUDRATEPRESCALER_128 +#define SPI_CLOCK_DIV256 SPI_BAUDRATEPRESCALER_256 + +#define SPI_MODE0 0x00 +#define SPI_MODE1 0x04 +#define SPI_MODE2 0x08 +#define SPI_MODE3 0x0C + +#define SPI_LAST 0 +#define SPI_CONTINUE 1 + + +class SPISettings { +public: + SPISettings(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) { + init_AlwaysInline(clock, bitOrder, dataMode); + } + SPISettings() { + init_AlwaysInline(SPI_CLOCK_DIV4, MSBFIRST, SPI_MODE0); + } +private: + void init_AlwaysInline(uint32_t clock, uint8_t bitOrder, uint8_t dataMode) + __attribute__((__always_inline__)) { + + /* Select the Bit Order */ + if(bitOrder == LSBFIRST) { + bitOrder = SPI_FIRSTBIT_LSB; + } + else { + bitOrder = SPI_FIRSTBIT_MSB; + } + hSPIx.Init.FirstBit = bitOrder; + + /* Select the SPI Communication Mode */ + if(dataMode == SPI_MODE0) { + hSPIx.Init.CLKPhase = SPI_PHASE_1EDGE; + hSPIx.Init.CLKPolarity = SPI_POLARITY_LOW; + } + else if(dataMode == SPI_MODE1) { + hSPIx.Init.CLKPhase = SPI_PHASE_2EDGE; + hSPIx.Init.CLKPolarity = SPI_POLARITY_LOW; + } + else if(dataMode == SPI_MODE2) { + hSPIx.Init.CLKPhase = SPI_PHASE_1EDGE; + hSPIx.Init.CLKPolarity = SPI_POLARITY_HIGH; + } + else { + hSPIx.Init.CLKPhase = SPI_PHASE_2EDGE; + hSPIx.Init.CLKPolarity = SPI_POLARITY_HIGH; + } + + /* Select the Clock Divider */ + hSPIx.Init.BaudRatePrescaler = clock; + + /* Initialize the SPIx */ + HAL_SPI_Init(&hSPIx); + } + + friend class SPIClass; +}; + + +class SPIClass { +public: + /* Initialize the SPI peripheral */ + static void begin(); + + /* Initialize the SPI peripheral and SS pin */ + static void begin(uint8_t slaveSelectPin); + + /* Initialize the SPI peripheral with settings */ + static void beginTransaction(SPISettings settings); + + /* Initialize the SPI peripheral */ + static void endTransaction(); + + /* Begin the transfer */ + static uint8_t transfer(uint8_t data); + static uint16_t transfer16(uint16_t data); + static void transfer(void *buf, size_t count); + static void transfer(uint8_t slaveSelectPin, uint8_t val, uint8_t transferMode); + + /* End the transfer */ + static void end(); + + static void end(uint8_t slaveSelectPin); + + /* Set Bit Order */ + static void setBitOrder(uint8_t bitOrder); + + /* Set Clock Divider */ + static void setClockDivider(uint8_t clockDiv); + + /* Set Communication Mode */ + static void setDataMode(uint8_t dataMode); + +}; + +extern SPIClass SPI; +//extern SPISettings SPISettings(SPI_CLOCK_DIV4, MSBFIRST, SPI_MODE0); #endif diff --git a/cores/arduino/spiF4.h b/cores/arduino/spiF4.h deleted file mode 100755 index e898ef2..0000000 --- a/cores/arduino/spiF4.h +++ /dev/null @@ -1,106 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f1/include/series/spi.h - * @author Marti Bolivar - * @brief STM32F1 SPI/I2S series header. - */ - -/* - * Arduino srl - www.arduino.org - * 2016 Jun 9: Edited Francesco Alessi (alfran) - francesco@arduino.org - */ - -#ifndef _SPIF4_H_ -#define _SPIF4_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * Register map base pointers - */ - -struct spi_reg_map; - -#define SPI1_BASE ((struct spi_reg_map*)0x40013000) -#define SPI2_BASE ((struct spi_reg_map*)0x40003800) -#define SPI3_BASE ((struct spi_reg_map*)0x40003C00) -#define SPI4_BASE ((struct spi_reg_map*)0x40013400) -#define SPI5_BASE ((struct spi_reg_map*)0x40015000) -#define SPI6_BASE ((struct spi_reg_map*)0x40015400) -/* - * Device pointers - */ - -struct spi_dev; - -extern struct spi_dev *SPI1; -extern struct spi_dev *SPI2; -extern struct spi_dev *SPI3; -extern struct spi_dev *SPI4; -extern struct spi_dev *SPI5; -extern struct spi_dev *SPI6; -#endif - -/* - * Routines - */ - -/* spi_gpio_cfg(): Backwards compatibility shim to spi_config_gpios() */ -struct gpio_dev; -extern void spi_config_gpios(struct spi_dev*, uint8, - struct gpio_dev*, uint8, - struct gpio_dev*, uint8, uint8, uint8); -/** - * @brief Deprecated. Use spi_config_gpios() instead. - * @see spi_config_gpios() - */ -static __always_inline void spi_gpio_cfg(uint8 as_master, - struct gpio_dev *nss_dev, - uint8 nss_bit, - struct gpio_dev *comm_dev, - uint8 sck_bit, - uint8 miso_bit, - uint8 mosi_bit) { - /* We switched style globally to foo_config_gpios() and always - * taking a foo_dev* argument (that last bit is the important - * part) after this function was written. - * - * However, spi_config_gpios() just ignores the spi_dev* on F1, so - * we can still keep this around for older code. */ - spi_config_gpios(NULL, as_master, nss_dev, nss_bit, - comm_dev, sck_bit, miso_bit, mosi_bit); -} - -#ifdef __cplusplus -} -#endif diff --git a/cores/arduino/spi_private.h b/cores/arduino/spi_private.h deleted file mode 100755 index ab97232..0000000 --- a/cores/arduino/spi_private.h +++ /dev/null @@ -1,43 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2012 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - - /* - * Arduino srl - www.arduino.org - * 2016 Jun 9: Edited Francesco Alessi (alfran) - francesco@arduino.org - */ - -#ifndef _SPI_PRIVATE_H_ -#define _SPI_PRIVATE_H_ - - -#define SPI_DEV(num) \ - { \ - .regs = SPI##num##_BASE, \ - .clk_id = RCC_SPI##num, \ - .irq_num = NVIC_SPI##num, \ - } - -#endif diff --git a/cores/arduino/spif4.c b/cores/arduino/spif4.c deleted file mode 100755 index 88d61cc..0000000 --- a/cores/arduino/spif4.c +++ /dev/null @@ -1,95 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011, 2012 LeafLabs, LLC. - * Copyright (c) 2010 Perry Hung. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -/** - * @file libmaple/stm32f1/spi.c - * @author Marti Bolivar - * @brief STM32F1 SPI/I2S. - */ - - /* - * Arduino srl - www.arduino.org - * 2016 Jun 9: Edited Francesco Alessi (alfran) - francesco@arduino.org - */ - -#include -#include -#include "spi_private.h" - -/* - * Devices - */ - -static spi_dev spi1 = SPI_DEV(1); -static spi_dev spi2 = SPI_DEV(2); - -spi_dev *SPI1 = &spi1; -spi_dev *SPI2 = &spi2; - - -static spi_dev spi3 = SPI_DEV(3); -static spi_dev spi4 = SPI_DEV(4); -static spi_dev spi5 = SPI_DEV(5); -static spi_dev spi6 = SPI_DEV(6); - -spi_dev *SPI3 = &spi3; -spi_dev *SPI4 = &spi4; -spi_dev *SPI5 = &spi5; -spi_dev *SPI6 = &spi6; - -/* - * Routines - */ - -void spi_config_gpios(spi_dev *ignored, - uint8 as_master, - gpio_dev *nss_dev, - uint8 nss_bit, - gpio_dev *comm_dev, - uint8 sck_bit, - uint8 miso_bit, - uint8 mosi_bit) { - if (as_master) { - gpio_set_mode(comm_dev, sck_bit, GPIO_AF_OUTPUT_PP); - gpio_set_mode(comm_dev, miso_bit, GPIO_AF_INPUT_PD); - gpio_set_mode(comm_dev, mosi_bit, GPIO_AF_OUTPUT_PP); - } else { - gpio_set_mode(nss_dev, nss_bit, GPIO_INPUT_FLOATING); - gpio_set_mode(comm_dev, sck_bit, GPIO_INPUT_FLOATING); - gpio_set_mode(comm_dev, miso_bit, GPIO_AF_OUTPUT_PP); - gpio_set_mode(comm_dev, mosi_bit, GPIO_INPUT_FLOATING); - } -} - -void spi_foreach(void (*fn)(spi_dev*)) { - fn(SPI1); - fn(SPI2); - fn(SPI3); - fn(SPI4); - fn(SPI5); - fn(SPI6); -} diff --git a/cores/arduino/timer.c b/cores/arduino/timer.c index 8117b0a..f1ee55b 100755 --- a/cores/arduino/timer.c +++ b/cores/arduino/timer.c @@ -43,9 +43,9 @@ * [5] = COM; * [6] = TRG; * [7] = BRK. */ -#define NR_ADV_HANDLERS 2 +#define NR_ADV_HANDLERS 8//2 /* Update, capture/compare 1,2,3,4; ; trigger. */ -#define NR_GEN_HANDLERS 10 +#define NR_GEN_HANDLERS 4//10 /* Update only. */ #define NR_BAS_HANDLERS 2 @@ -306,8 +306,8 @@ void timer_foreach(void (*fn)(timer_dev*)) { //*bb_perip(&(TIMER6->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; // --- Timer 7 Preset - //(TIMER7->regs).gen->PSC = 0; - //*bb_perip(&(TIMER7->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; + (TIMER7->regs).gen->PSC = 0; + *bb_perip(&(TIMER7->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; // --- Timer 8 Preset (TIMER8->regs).gen->PSC = 2; @@ -330,12 +330,12 @@ void timer_foreach(void (*fn)(timer_dev*)) { *bb_perip(&(TIMER12->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; // --- Timer 13 Preset - //(TIMER13->regs).gen->PSC = 0; - //*bb_perip(&(TIMER13->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; + (TIMER13->regs).gen->PSC = 0; + *bb_perip(&(TIMER13->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; // --- Timer 14 Preset - //(TIMER14->regs).gen->PSC = 0; - //*bb_perip(&(TIMER14->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; + (TIMER14->regs).gen->PSC = 0; + *bb_perip(&(TIMER14->regs).gen->EGR, TIMER_EGR_UG_BIT) = 1; } @@ -352,6 +352,14 @@ void timer_foreach(void (*fn)(timer_dev*)) { void timer_attach_interrupt(timer_dev *dev, uint8 interrupt, voidFuncPtr handler) { + dev->handlers[interrupt-1] = handler; + timer_enable_irq(dev, interrupt); + enable_irq(dev, interrupt); +} + +void tone_attach_interrupt(timer_dev *dev, + uint8 interrupt, + voidFuncPtr handler) { dev->handlers[interrupt] = handler; timer_enable_irq(dev, interrupt); enable_irq(dev, interrupt); @@ -368,7 +376,12 @@ void timer_attach_interrupt(timer_dev *dev, */ void timer_detach_interrupt(timer_dev *dev, uint8 interrupt) { timer_disable_irq(dev, interrupt); - dev->handlers[interrupt] = NULL; + dev->handlers[interrupt-1] = NULL; +} + +void tone_detach_interrupt(timer_dev *dev, uint8 interrupt) { + timer_disable_irq(dev, interrupt); + dev->handlers[interrupt-1] = NULL; } /* diff --git a/cores/arduino/timer.h b/cores/arduino/timer.h index 0cd4b94..ff5bb17 100755 --- a/cores/arduino/timer.h +++ b/cores/arduino/timer.h @@ -605,6 +605,11 @@ typedef enum timer_interrupt_id { void timer_attach_interrupt(timer_dev *dev, uint8 interrupt, voidFuncPtr handler); + +void tone_attach_interrupt(timer_dev *dev, + uint8 interrupt, + voidFuncPtr handler); + void timer_detach_interrupt(timer_dev *dev, uint8 interrupt); /** diff --git a/cores/arduino/wiring.h b/cores/arduino/wiring.h index 7bdf88d..905f5ae 100755 --- a/cores/arduino/wiring.h +++ b/cores/arduino/wiring.h @@ -51,7 +51,7 @@ #include "wiring_math.h" #include "wiring_time.h" #include -#include "HardwareSPI.h" +#include "SPI.h" #include "HardwareSerial.h" #include "HardwareTimer.h" #include "usb_serial.h" diff --git a/platform.txt b/platform.txt index 3af9e78..af651da 100755 --- a/platform.txt +++ b/platform.txt @@ -27,6 +27,7 @@ compiler.ar.flags=rcs compiler.objcopy.cmd=arm-none-eabi-objcopy compiler.objcopy.eep.flags=-O ihex -j .eeprom --set-section-flags=.eeprom=alloc,load --no-change-warnings --change-section-lma .eeprom=0 compiler.elf2hex.flags=-O binary +compiler.elf2hex.flags2=-O ihex compiler.elf2hex.cmd=arm-none-eabi-objcopy compiler.ldflags= -mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork -lm -lc compiler.size.cmd=arm-none-eabi-size @@ -70,8 +71,11 @@ recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.f ## Create eeprom recipe.objcopy.eep.pattern= +## Create bin +recipe.objcopy.bin.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.bin" + ## Create hex -recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.bin" +recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags2} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.hex" ## Compute size recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf" @@ -115,7 +119,7 @@ tools.stlink.upload.pattern="{path}/{cmd}" {serial.port.file} {upload.altID} {up tools.dfu-util.cmd=dfu-util tools.dfu-util.cmd.windows=StAr_Write.bat -tools.dfu-util.path={runtime.ide.path}/hardware/tools/dfu-util/bin +tools.dfu-util.path={runtime.ide.path}/hardware/tools/dfu-util/ tools.dfu-util.upload.params.verbose=-v tools.dfu-util.upload.params.quiet= @@ -127,4 +131,4 @@ tools.dfu-util.upload.pattern="{path}/{cmd}" "{path}" {upload.usbID} {upload.alt # Default usb manufacturer will be replaced at compile time using # numeric vendor ID if available or by board's specific value. build.usb_manufacturer="Unknown" -build.usb_flags=-DUSB_VID={build.vid} -DUSB_PID={build.pid} -DUSBCON '-DUSB_MANUFACTURER={build.usb_manufacturer}' '-DUSB_PRODUCT={build.usb_product}' +tools.dfu-util.upload.pattern="{path}/{cmd}" "{path}" -l -d {upload.usbID} -a {upload.altID} -s {upload.mem_start} -O "{build.path}/{build.project_name}.bin" -f 0x08000000