[AVR] Updated to LLVM master

Author: Dylan McKay

lib/Target/AVR/AVRBranchSelector.cpp

@@ -74,7 +74,7 @@ static bool isCondBranch(int Opcode)
 bool AVRBSel::runOnMachineFunction(MachineFunction &Fn)
 { 
   const AVRInstrInfo *TII =
-    static_cast<const AVRInstrInfo *>(Fn.getTarget().getSubtargetImpl()->getInstrInfo());
+    static_cast<const AVRTargetMachine&>(Fn.getTarget()).getSubtargetImpl()->getInstrInfo();
 
   // Give the blocks of the function a dense, in-order, numbering.
   Fn.RenumberBlocks();

lib/Target/AVR/AVRISelDAGToDAG.cpp

@@ -33,13 +33,15 @@ class AVRDAGToDAGISel : public SelectionDAGISel
 {
 public:
   explicit AVRDAGToDAGISel(AVRTargetMachine &tm, CodeGenOpt::Level OptLevel) :
-    SelectionDAGISel(tm, OptLevel), Subtarget(&tm.getSubtarget<AVRSubtarget>()) {}
+    SelectionDAGISel(tm, OptLevel), Subtarget(nullptr) {}
 
   const char *getPassName() const
   {
     return "AVR DAG->DAG Instruction Selection";
   }
 
+  bool runOnMachineFunction(MachineFunction &MF) override;
+
   // Address Selection.
   bool SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp);
   // Indexed load (postinc and predec) matching code.
@@ -61,6 +63,15 @@ class AVRDAGToDAGISel : public SelectionDAGISel
 
 } // end of anonymous namespace
 
+bool
+AVRDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
+
+  Subtarget = &static_cast<const AVRSubtarget &>(MF.getSubtarget());
+  bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
+
+  return Ret;
+}
+
 bool
 AVRDAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base, SDValue &Disp)
 {

lib/Target/AVR/AVRISelLowering.cpp

@@ -1133,7 +1133,7 @@ AVRTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   // Add a register mask operand representing the call-preserved registers.
   const AVRTargetMachine& TM = (const AVRTargetMachine&)getTargetMachine();
   const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
-  const uint32_t *Mask = TRI->getCallPreservedMask(CallConv);
+  const uint32_t *Mask = TRI->getCallPreservedMask(DAG.getMachineFunction(), CallConv);
   assert(Mask && "Missing call preserved mask for calling convention");
   Ops.push_back(DAG.getRegisterMask(Mask));
 
@@ -1644,7 +1644,10 @@ std::pair<unsigned, const TargetRegisterClass *>
 AVRTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
                                                 MVT VT) const
 {
+  auto STI = static_cast<const AVRTargetMachine&>(this->getTargetMachine()).getSubtargetImpl();
+
   // We only support i8 and i16.
+  //
   //:FIXME: remove this assert for now since it gets sometimes executed
   //assert((VT == MVT::i16 || VT == MVT::i8) && "Wrong operand type.");
 
@@ -1688,7 +1691,7 @@ AVRTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
     }
   }
 
-  return TargetLowering::getRegForInlineAsmConstraint(getTargetMachine().getSubtargetImpl()->getRegisterInfo(), Constraint, VT);
+  return TargetLowering::getRegForInlineAsmConstraint(STI->getRegisterInfo(), Constraint, VT);
 }
 
 void AVRTargetLowering::LowerAsmOperandForConstraint(SDValue Op,

lib/Target/AVR/AVRTargetMachine.cpp

@@ -31,9 +31,9 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, StringRef TT, StringRef CPU,
                                    StringRef FS, const TargetOptions &Options,
                                    Reloc::Model RM, CodeModel::Model CM,
                                    CodeGenOpt::Level OL) :
-  LLVMTargetMachine(T, TT, CPU.empty() ? DefaultCPU : CPU, FS, Options, RM, CM, OL),
-  SubTarget(TT, CPU, FS, *this),
-  DL("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8")
+  LLVMTargetMachine(T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8",
+                    TT, CPU.empty() ? DefaultCPU : CPU, FS, Options, RM, CM, OL),
+  SubTarget(TT, CPU, FS, *this)
 {
   this->TLOF = make_unique<AVRTargetObjectFile>();
   initAsmInfo();
@@ -75,6 +75,11 @@ const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const
   return &SubTarget;
 }
 
+const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function&) const
+{
+  return &SubTarget;
+}
+
 //===----------------------------------------------------------------------===//
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//

lib/Target/AVR/AVRTargetMachine.h

@@ -34,8 +34,8 @@ class AVRTargetMachine : public LLVMTargetMachine
                    CodeModel::Model CM, CodeGenOpt::Level OL);
 public: // TargetMachine
 
-  const AVRSubtarget *getSubtargetImpl() const override;
-  const DataLayout *getDataLayout() const override { return &DL; }
+  const AVRSubtarget *getSubtargetImpl() const;
+  const AVRSubtarget *getSubtargetImpl(const Function &) const override;
 
   TargetLoweringObjectFile *getObjFileLowering() const override { return this->TLOF.get(); }
 
@@ -47,7 +47,6 @@ class AVRTargetMachine : public LLVMTargetMachine
 private:
   std::unique_ptr<TargetLoweringObjectFile> TLOF;
   AVRSubtarget SubTarget;
-  const DataLayout DL;
 };
 
 } // end namespace llvm

lib/Target/AVR/AVRTargetStreamer.h

@@ -0,0 +1,40 @@
+//===-- AVRTargetStreamer.h - AVR Target Streamer ----------*- C++ -*--===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_AVR_SPARCTARGETSTREAMER_H
+#define LLVM_LIB_TARGET_AVR_SPARCTARGETSTREAMER_H
+
+#include "llvm/MC/MCELFStreamer.h"
+#include "llvm/MC/MCStreamer.h"
+
+namespace llvm {
+class AVRTargetStreamer : public MCTargetStreamer {
+  virtual void anchor();
+
+public:
+  AVRTargetStreamer(MCStreamer &S);
+};
+
+// This part is for ascii assembly output
+class AVRTargetAsmStreamer : public AVRTargetStreamer {
+  formatted_raw_ostream &OS;
+
+public:
+  AVRTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
+};
+
+// This part is for ELF object output
+class AVRTargetELFStreamer : public AVRTargetStreamer {
+public:
+  AVRTargetELFStreamer(MCStreamer &S);
+  MCELFStreamer &getStreamer();
+};
+} // end namespace llvm
+
+#endif

lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp

@@ -34,7 +34,6 @@
 
 MCCodeEmitter *llvm::createAVRMCCodeEmitter(const MCInstrInfo &MCII,
                                          const MCRegisterInfo &MRI,
-                                         const MCSubtargetInfo &STI,
                                          MCContext &Ctx) {
   return new AVRMCCodeEmitter(MCII, Ctx, false);
 }

lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp

@@ -10,6 +10,7 @@
 #include "AVRMCExpr.h"
 #include "llvm/MC/MCAssembler.h"
 #include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCStreamer.h"
 
 using namespace llvm;
 

lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp

@@ -13,6 +13,7 @@
 
 #include "AVRMCTargetDesc.h"
 #include "AVRMCAsmInfo.h"
+#include "AVRTargetStreamer.h"
 #include "InstPrinter/AVRInstPrinter.h"
 #include "llvm/MC/MCCodeGenInfo.h"
 #include "llvm/MC/MCInstrInfo.h"
@@ -82,22 +83,23 @@ static MCInstPrinter *createAVRMCInstPrinter(const Target &T,
   return 0;
 }
 
-static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
-                                    MCContext &Context, MCAsmBackend &MAB,
-                                    raw_ostream &OS, MCCodeEmitter *Emitter,
-                                    const MCSubtargetInfo &STI,
-                                    bool RelaxAll) {
+static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
+                                    MCAsmBackend &MAB, raw_ostream &OS,
+                                    MCCodeEmitter *Emitter, bool RelaxAll) {
   return createELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
 }
 
-static MCStreamer *
-createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
-                    bool isVerboseAsm,
-                    bool useDwarfDirectory, MCInstPrinter *InstPrint,
-                    MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) {
-  return llvm::createAsmStreamer(Ctx, OS, isVerboseAsm,
-                                 useDwarfDirectory, InstPrint, CE, TAB,
-                                 ShowInst);
+static MCTargetStreamer *
+createAVRObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
+
+  return new AVRTargetELFStreamer(S);
+}
+
+static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
+                                                   formatted_raw_ostream &OS,
+                                                   MCInstPrinter *InstPrint,
+                                                   bool isVerboseAsm) {
+  return new AVRTargetAsmStreamer(S, OS);
 }
 
 extern "C" void LLVMInitializeAVRTargetMC()
@@ -124,12 +126,14 @@ extern "C" void LLVMInitializeAVRTargetMC()
   // Register the MC Code Emitter
   TargetRegistry::RegisterMCCodeEmitter(TheAVRTarget,
                                         createAVRMCCodeEmitter);
+  // Register the ELF streamer
+  TargetRegistry::RegisterELFStreamer(TheAVRTarget, createMCStreamer);
 
-  // Register the object streamer.
-  TargetRegistry::RegisterMCObjectStreamer(TheAVRTarget, createMCStreamer);
+  // Register the obj target streamer.
+  TargetRegistry::RegisterObjectTargetStreamer(TheAVRTarget, createAVRObjectTargetStreamer);
 
-  // Register the asm streamer.
-  TargetRegistry::RegisterAsmStreamer(TheAVRTarget, createMCAsmStreamer);
+  // Register the asm target streamer.
+  TargetRegistry::RegisterAsmTargetStreamer(TheAVRTarget, createMCAsmTargetStreamer);
 
   // Register the asm backend (as little endian).
   TargetRegistry::RegisterMCAsmBackend(TheAVRTarget,

lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h

@@ -27,14 +27,15 @@ namespace llvm
     class MCContext;
     class StringRef;
     class Target;
+    class MCStreamer;
+    class MCTargetStreamer;
     class raw_ostream;
 
     extern Target TheAVRTarget;
 
 
     MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
                                           const MCRegisterInfo &MRI,
-                                          const MCSubtargetInfo &STI,
                                           MCContext &Ctx);
     /*!
      * \brief Creates a little endian AVR assembly backend.

lib/Target/AVR/MCTargetDesc/AVRTargetStreamer.cpp

@@ -0,0 +1,34 @@
+//===-- AVRTargetStreamer.cpp - AVR Target Streamer Methods -----------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file provides AVR specific target streamer methods.
+//
+//===----------------------------------------------------------------------===//
+
+#include "AVRTargetStreamer.h"
+#include "InstPrinter/AVRInstPrinter.h"
+#include "llvm/Support/FormattedStream.h"
+
+using namespace llvm;
+
+// pin vtable to this file
+AVRTargetStreamer::AVRTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
+
+void AVRTargetStreamer::anchor() {}
+
+AVRTargetAsmStreamer::AVRTargetAsmStreamer(MCStreamer &S,
+                                               formatted_raw_ostream &OS)
+    : AVRTargetStreamer(S), OS(OS) {}
+
+AVRTargetELFStreamer::AVRTargetELFStreamer(MCStreamer &S)
+    : AVRTargetStreamer(S) {}
+
+MCELFStreamer &AVRTargetELFStreamer::getStreamer() {
+  return static_cast<MCELFStreamer &>(Streamer);
+}

lib/Target/AVR/MCTargetDesc/CMakeLists.txt

@@ -5,6 +5,7 @@ add_llvm_library(LLVMAVRDesc
   AVRAsmBackend.cpp
   AVRELFObjectWriter.cpp
   AVRMCCodeEmitter.cpp
+  AVRTargetStreamer.cpp
   )
 
 add_dependencies(LLVMAVRDesc AVRCommonTableGen)