[AVR] Fixed earlyclobber typo causing bug.

Dylan McKay · Dylan McKay · commit 26896ec40924 · 2015-06-07T22:22:41.000+12:00
diff --git a/lib/Target/AVR/AVRInstrInfo.td b/lib/Target/AVR/AVRInstrInfo.td
@@ -480,7 +480,7 @@ Defs = [R1, R0, SREG] in
 
     // The earlyclobber flag is required because the pseudo expansion needs $rd
     // and $src to have different registers.
-    let Constraints = "@earlyclobber $src" in
+    let Constraints = "@earlyclobber $rd" in
     def MULWRdRr : Pseudo<(outs DREGS:$rd),
                           (ins DREGS:$src, DREGS:$rr),
                           "mulw\t$rd, $src, $rr",
diff --git a/test/CodeGen/AVR/mul.ll b/test/CodeGen/AVR/mul.ll
@@ -1,5 +1,4 @@
 ; RUN: llc -mattr=mul,movw < %s -march=avr | FileCheck %s
-; XFAIL: *
 
 define i8 @mult8(i8 %a, i8 %b) {
 ; CHECK-LABEL: mult8:

Original file line number	Diff line number	Diff line change
`@@ -1,5 +1,4 @@`
`1`	`1`	`; RUN: llc -mattr=mul,movw < %s -march=avr \| FileCheck %s`
`2`		`-; XFAIL: *`
`3`	`2`
`4`	`3`	`define i8 @mult8(i8 %a, i8 %b) {`
`5`	`4`	`; CHECK-LABEL: mult8:`