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Merge pull request scala#5518 from som-snytt/issue/10037-2.11
SI-10037 ASR/LSR switched in ICodeReader
2 parents e8a3f7b + 1dfdb9c commit 35f8908

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6 files changed

+23
-5
lines changed

6 files changed

+23
-5
lines changed

src/compiler/scala/tools/nsc/backend/icode/Primitives.scala

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@@ -210,7 +210,7 @@ trait Primitives { self: ICodes =>
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case LSL => "LSL"
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case ASR => "ASR"
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case LSR => "LSR"
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case _ => throw new RuntimeException("ShitOp unknown case")
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case _ => throw new RuntimeException("ShiftOp unknown case")
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}
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}
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src/compiler/scala/tools/nsc/symtab/classfile/ICodeReader.scala

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@@ -452,10 +452,10 @@ abstract class ICodeReader extends ClassfileParser {
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case JVM.ishl => code.emit(CALL_PRIMITIVE(Shift(LSL, INT)))
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case JVM.lshl => code.emit(CALL_PRIMITIVE(Shift(LSL, LONG)))
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case JVM.ishr => code.emit(CALL_PRIMITIVE(Shift(LSR, INT)))
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case JVM.lshr => code.emit(CALL_PRIMITIVE(Shift(LSR, LONG)))
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case JVM.iushr => code.emit(CALL_PRIMITIVE(Shift(ASR, INT)))
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case JVM.lushr => code.emit(CALL_PRIMITIVE(Shift(ASR, LONG)))
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case JVM.ishr => code.emit(CALL_PRIMITIVE(Shift(ASR, INT)))
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case JVM.lshr => code.emit(CALL_PRIMITIVE(Shift(ASR, LONG)))
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case JVM.iushr => code.emit(CALL_PRIMITIVE(Shift(LSR, INT)))
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case JVM.lushr => code.emit(CALL_PRIMITIVE(Shift(LSR, LONG)))
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case JVM.iand => code.emit(CALL_PRIMITIVE(Logical(AND, INT)))
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case JVM.land => code.emit(CALL_PRIMITIVE(Logical(AND, LONG)))
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case JVM.ior => code.emit(CALL_PRIMITIVE(Logical(OR, INT)))

test/files/run/t10037.check

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@@ -0,0 +1,2 @@
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-1073741824
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test/files/run/t10037.flags

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-optimise -Ybackend:GenASM -Yinline-warnings

test/files/run/t10037/shifter_2.scala

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object Test extends App {
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val i = shifty.X.f(Int.MinValue)
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val j = shifty.X.g(Int.MinValue)
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println(i)
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println(j)
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}
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test/files/run/t10037/shifty_1.scala

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@@ -0,0 +1,7 @@
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package shifty
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object X {
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@inline def f(i: Int): Int = i >> 1
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@inline def g(i: Int): Int = i >>> 1
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}

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