From 3a531eb63f0d086532da14d0d49b5dfdd1dcf844 Mon Sep 17 00:00:00 2001 From: Fabio Gutmann Date: Tue, 1 Jul 2025 15:33:18 +0200 Subject: [PATCH] fix clk_wiz divisor calculation --- XilinxProcessorIPLib/drivers/clk_wiz/src/xclk_wiz.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/XilinxProcessorIPLib/drivers/clk_wiz/src/xclk_wiz.c b/XilinxProcessorIPLib/drivers/clk_wiz/src/xclk_wiz.c index 3ec1841717a..594a550aff9 100644 --- a/XilinxProcessorIPLib/drivers/clk_wiz/src/xclk_wiz.c +++ b/XilinxProcessorIPLib/drivers/clk_wiz/src/xclk_wiz.c @@ -171,11 +171,7 @@ static u32 XClk_Wiz_CalculateDivisors (XClk_Wiz *InstancePtr, u64 SetRate) for (m = Mmin; m <= Mmax; m++) { for (d = Dmin; d <= Dmax; d++) { -#ifndef SDT Fvco = InstancePtr->Config.PrimInClkFreq * m / d; -#else - Fvco = InstancePtr->Config.PrimInClkFreq * m / (d * XCLK_MHZ); -#endif if ( Fvco >= VcoMin && Fvco <= VcoMax ) { for (Div = Omin; Div <= Omax; Div++ ) { @@ -268,11 +264,7 @@ static u32 XClk_Wiz_CalculateDivisorsHz (XClk_Wiz *InstancePtr, u64 SetRate) for (m = Mmin; m <= Mmax; m++) { for (d = Dmin; d <= Dmax; d++) { -#ifndef SDT Fvco = InstancePtr->Config.PrimInClkFreq * XCLK_MHZ * m / d; -#else - Fvco = InstancePtr->Config.PrimInClkFreq * m / d; -#endif if ( Fvco >= VcoMin * XCLK_MHZ && Fvco <= VcoMax * XCLK_MHZ ) { for (Div = Omin; Div <= Omax; Div++ ) {