From 7d1ca5f56f4188b40af43ae61ddcd85588d3d2bf Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Wed, 6 Nov 2024 15:55:34 -0800 Subject: [PATCH 1/8] new isa detection intrinsics documentation --- docs/build/reference/arch-x64.md | 2 +- docs/build/reference/arch-x86.md | 2 +- ...abetical-listing-of-intrinsic-functions.md | 2 + docs/intrinsics/check-isa-arch-support.md | 142 ++++++++++++++++++ docs/intrinsics/toc.yml | 2 + docs/intrinsics/x64-amd64-intrinsics-list.md | 2 + docs/intrinsics/x86-intrinsics-list.md | 2 + 7 files changed, 152 insertions(+), 2 deletions(-) create mode 100644 docs/intrinsics/check-isa-arch-support.md diff --git a/docs/build/reference/arch-x64.md b/docs/build/reference/arch-x64.md index ada1bae0c0..b86acb7da9 100644 --- a/docs/build/reference/arch-x64.md +++ b/docs/build/reference/arch-x64.md @@ -35,7 +35,7 @@ Enables Intel Advanced Vector Extensions 10 version 1. ## Remarks -The **`/arch`** option enables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors, although you should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. +The **`/arch`** option enables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors, although you should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequenctly used CPU features. **`/arch`** only affects code generation for native functions. When you use [`/clr`](clr-common-language-runtime-compilation.md) to compile, **`/arch`** has no effect on code generation for managed functions. diff --git a/docs/build/reference/arch-x86.md b/docs/build/reference/arch-x86.md index e4418aa273..5e767e2dba 100644 --- a/docs/build/reference/arch-x86.md +++ b/docs/build/reference/arch-x86.md @@ -38,7 +38,7 @@ Enables Intel Advanced Vector Extensions 10 version 1. ## Remarks -The **`/arch`** option enables or disables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors. You should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. +The **`/arch`** option enables or disables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors. You should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequenctly used CPU features. **`/arch`** only affects code generation for native functions. When you use [`/clr`](clr-common-language-runtime-compilation.md) to compile, **`/arch`** has no effect on code generation for managed functions. diff --git a/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md b/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md index cf4ffa0393..c42e3617c6 100644 --- a/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md +++ b/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md @@ -29,6 +29,8 @@ The following sections describe the Microsoft-specific intrinsic functions avail [`_bittestandset`, `_bittestandset64`](../intrinsics/bittestandset-bittestandset64.md) +[`__check_isa_support`, `__check_arch_support`](../intrinsics/check-isa-arch-support.md) + [`__cpuid`, `__cpuidex`](../intrinsics/cpuid-cpuidex.md) [`_cvt_ftoi_fast`, `_cvt_ftoll_fast`, `_cvt_ftoui_fast`, `_cvt_ftoull_fast`, `_cvt_dtoi_fast`, `_cvt_dtoll_fast`, `_cvt_dtoui_fast`, `_cvt_dtoull_fast`](../intrinsics/fast-conversion-functions.md) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md new file mode 100644 index 0000000000..1965d7b358 --- /dev/null +++ b/docs/intrinsics/check-isa-arch-support.md @@ -0,0 +1,142 @@ +--- +description: "Learn more about: __check_isa_support, __check_arch_support" +title: "__check_isa_support, __check_arch_support" +ms.date: "09/02/2019" +f1_keywords: ["__check_isa_support", "__check_arch_support"] +helpviewer_keywords: ["__check_isa_support intrinsic", "__check_arch_support intrinsic"] +ms.assetid: f8c344d3-91bf-405f-8622-cb0e337a6bdc +--- +# __check_isa_support, __check_arch_support + +**Microsoft Specific** + +Detects if the specified ISA feature and AVX10 version is supported by either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time. + +## Syntax + +```C +_Bool __check_isa_support( + unsigned feature, + unsigned avx10_version +); + +_Bool __check_arch_support( + unsigned feature, + unsigned avx10_version +); +``` + +```C++ +bool __check_isa_support( + unsigned feature, + unsigned avx10_version +); + +bool __check_arch_support( + unsigned feature, + unsigned avx10_version +); +``` + +### Parameters + +*feature*\ +[in] ISA feature to be checked. + +*avx10_version*\ +[in] AVX10 version to be checked. Should be 0 if AVX10 version check is not required. + +## Return value + +`__check_isa_support` returns `true` if the `feature` and `avx10_version` are supported on the processor at run time, `false` otherwise. +`__check_arch_support` returns `true` if the `feature` and `avx10_version` are supported on the `/arch` flag passed in at compile time, `false` otherwise. + +## Requirements + +|Intrinsic|Architecture| +|---------------|------------------| +|`__check_isa_support`|x86, x64| +|`__check_arch_support`|x86, x64| + +**Header file** \ + +## Remarks + +The `__check_isa_support` intrinsic provides a faster alternative to [`__cpuid`](cpuid-cpuidex.md) intrinsic to dynamically check for most frequently used CPU features. The `__check_arch_support` intrinsic provides an alternative to [`predefined macros`](..\preprocessor\predefined-macros.md) for compile time code selection based on ISA extensions. + +The feature values that can be used in these intrisics are in the table below. These are defined in isa_availability.h + +|Feature Value Name|Description| +|---------------|------------------| +|`__IA_SUPPORT_VECTOR128`|Vector instructions with lengths up to 128 bits. This is enabled for SSE2 or later extensions| +|`__IA_SUPPORT_VECTOR256`|Vector instructions with lengths up to 256 bits. This is enabled for AVX2 or later extensions| +|`__IA_SUPPORT_VECTOR512`|Vector instructions with lengths up to 512 bits. This is enabled for AVX-512 or later extensions| +|`__IA_SUPPORT_AVX10`|AVX10 support. This is enabled for AVX10.1 or later extensions| +|`__IA_SUPPORT_SSE42`|SSE4.2 support| +|`__IA_SUPPORT_SV128X`|AVX-512 instructions for scalar of 128-bits. Can be used to signal that certain useful AVX-512 instruction like conversions can be used in scalar code| +|`__IA_SUPPORT_AVX10_2`|AVX10.2 support| +|`__IA_SUPPORT_APX`|APX support| +|`__IA_SUPPORT_FP16`|Half-precision floating-point instruction support| + +Multiple feature values can be combined together using the OR(|) operator. + +The `__check_arch_support` intrinsic can always be evaluated at compile time, so using it in optimized code adds no additional instructions to execute. + +## Example + +This example uses 256-bit AVX-512 instructions to vectorize conversion of double-precision values in input to 64-bit signed integer values in output. The tail loop for converting any source values not handled by the vector code is also used in case the vector code cannot be executed. Note that the compile-time support is checked before runtime support so that a runtime check can be avoided if possible. + +```cpp +// Compile this test with: /EHsc /O2 +#include +#include +#include +#include +using namespace std; + +#define CHECK_INSTRUCTION_SUPPORT(a,v) \ + (__check_arch_support((a),(v)) || __check_isa_support((a),(v))) + +int main() +{ + vector input = {0.3, 1.4, 2.5, 3.6, 4.7, 5.8, 6.9, 8.0, 9.1, 11.14}; + vector<__int64> output(10, 0); + int i = 0; + + if (CHECK_INSTRUCTION_SUPPORT(__IA_SUPPORT_SV128X | __IA_SUPPORT_VECTOR256, 0)) + { + for (; i < input.size() - 4; i += 4) + { + __m256i values = _mm256_cvttpd_epi64(_mm256_load_pd(&input[i])); + _mm256_storeu_epi64((void*)&output[i], values); + } + } + for (; i < input.size(); i++) + { + output[i] = input[i]; + } + + for (i = 0; i < output.size(); i++) { + cout << "output[" << i << "] = " << output[i] << endl; + } +} +``` + +```Output +output[0] = 0 +output[1] = 1 +output[2] = 2 +output[3] = 3 +output[4] = 4 +output[5] = 5 +output[6] = 6 +output[7] = 8 +output[8] = 9 +output[9] = 11 +``` + +**END Microsoft Specific** + +## See also + +[Compiler intrinsics](../intrinsics/compiler-intrinsics.md) diff --git a/docs/intrinsics/toc.yml b/docs/intrinsics/toc.yml index cfbc51772b..eb04364ed4 100644 --- a/docs/intrinsics/toc.yml +++ b/docs/intrinsics/toc.yml @@ -39,6 +39,8 @@ items: href: ../intrinsics/bittestandreset-bittestandreset64.md - name: _bittestandset, _bittestandset64 href: ../intrinsics/bittestandset-bittestandset64.md + - name: __check_isa_support, __check_arch_support + href: ../intrinsics/check-isa-arch-support.md - name: __cpuid, __cpuidex href: ../intrinsics/cpuid-cpuidex.md - name: __debugbreak diff --git a/docs/intrinsics/x64-amd64-intrinsics-list.md b/docs/intrinsics/x64-amd64-intrinsics-list.md index 92f7c81f83..555087d4d5 100644 --- a/docs/intrinsics/x64-amd64-intrinsics-list.md +++ b/docs/intrinsics/x64-amd64-intrinsics-list.md @@ -84,6 +84,8 @@ The following table lists the intrinsics available on x64 processors. The Techno | [`_castf64_u64`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castf64_u64) | | immintrin.h | `unsigned __int64 _castf64_u64 (double);` | | [`_castu32_f32`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castu32_f32) | | immintrin.h | `float _castu32_f32 (unsigned __int32);` | | [`_castu64_f64`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castu64_f64) | | immintrin.h | `double _castu64_f64 (unsigned __int64 a);` | +| [`__check_isa_support`](check-isa-arch-support.md) | | immintrin.h | `bool __check_isa_support(unsigned int, unsigned int);` | +| [`__check_arch_support`](check-isa-arch-support.md) | | immintrin.h | `bool __check_arch_support(unsigned int, unsigned int);` | | `_clac` | SMAP | intrin.h | `void _clac(void);` | | [`__cpuid`](cpuid-cpuidex.md) | | intrin.h | `void __cpuid(int *, int);` | | [`__cpuidex`](cpuid-cpuidex.md) | | intrin.h | `void __cpuidex(int *, int, int);` | diff --git a/docs/intrinsics/x86-intrinsics-list.md b/docs/intrinsics/x86-intrinsics-list.md index 7dbe84d0b7..4c494efabc 100644 --- a/docs/intrinsics/x86-intrinsics-list.md +++ b/docs/intrinsics/x86-intrinsics-list.md @@ -61,6 +61,8 @@ The following table lists the intrinsics available on x86 processors. The Techno | [`_castf64_u64`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castf64_u64) | | immintrin.h | `unsigned __int64 _castf64_u64 (double);` | | [`_castu32_f32`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castu32_f32) | | immintrin.h | `float _castu32_f32 (unsigned __int32);` | | [`_castu64_f64`](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_castu64_f64) | | immintrin.h | `double _castu64_f64 (unsigned __int64 a);` | +| [`__check_isa_support`](check-isa-arch-support.md) | | immintrin.h | `bool __check_isa_support(unsigned int, unsigned int);` | +| [`__check_arch_support`](check-isa-arch-support.md) | | immintrin.h | `bool __check_arch_support(unsigned int, unsigned int);` | | `_clac` | SMAP | intrin.h | `void _clac(void);` | | [`__cpuid`](cpuid-cpuidex.md) | | intrin.h | `void __cpuid(int *, int);` | | [`__cpuidex`](cpuid-cpuidex.md) | | intrin.h | `void __cpuidex(int *, int, int);` | From 4a1ccf468127d40afead6a2831c3edd6c4dd8bae Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Wed, 6 Nov 2024 22:13:55 -0800 Subject: [PATCH 2/8] update 1 --- docs/build/reference/arch-x64.md | 2 +- docs/build/reference/arch-x86.md | 2 +- docs/intrinsics/check-isa-arch-support.md | 21 +++++++++++---------- 3 files changed, 13 insertions(+), 12 deletions(-) diff --git a/docs/build/reference/arch-x64.md b/docs/build/reference/arch-x64.md index b86acb7da9..02fe9eb27b 100644 --- a/docs/build/reference/arch-x64.md +++ b/docs/build/reference/arch-x64.md @@ -35,7 +35,7 @@ Enables Intel Advanced Vector Extensions 10 version 1. ## Remarks -The **`/arch`** option enables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors, although you should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequenctly used CPU features. +The **`/arch`** option enables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors, although you should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequently used CPU features. **`/arch`** only affects code generation for native functions. When you use [`/clr`](clr-common-language-runtime-compilation.md) to compile, **`/arch`** has no effect on code generation for managed functions. diff --git a/docs/build/reference/arch-x86.md b/docs/build/reference/arch-x86.md index 5e767e2dba..e0806f08b8 100644 --- a/docs/build/reference/arch-x86.md +++ b/docs/build/reference/arch-x86.md @@ -38,7 +38,7 @@ Enables Intel Advanced Vector Extensions 10 version 1. ## Remarks -The **`/arch`** option enables or disables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors. You should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequenctly used CPU features. +The **`/arch`** option enables or disables the use of certain instruction set extensions, particularly for vector calculation, available in processors from Intel and AMD. In general, more recently introduced processors may support extensions beyond the ones supported by older processors. You should consult the documentation for a particular processor or test for instruction set extension support using [`__cpuid`](../../intrinsics/cpuid-cpuidex.md) before executing code using an instruction set extension. You can also use the [`__check_isa_support`](../../intrinsics/check-isa-arch-support.md) intrinsic to check for more frequently used CPU features. **`/arch`** only affects code generation for native functions. When you use [`/clr`](clr-common-language-runtime-compilation.md) to compile, **`/arch`** has no effect on code generation for managed functions. diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index 1965d7b358..48c57868cb 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -10,7 +10,7 @@ ms.assetid: f8c344d3-91bf-405f-8622-cb0e337a6bdc **Microsoft Specific** -Detects if the specified ISA feature and AVX10 version is supported by either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time. +Detects if either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time supports the specified ISA feature and AVX10 version. ## Syntax @@ -44,7 +44,7 @@ bool __check_arch_support( [in] ISA feature to be checked. *avx10_version*\ -[in] AVX10 version to be checked. Should be 0 if AVX10 version check is not required. +[in] AVX10 version to be checked. Should be 0 if AVX10 version check isn't required. ## Return value @@ -64,27 +64,28 @@ bool __check_arch_support( The `__check_isa_support` intrinsic provides a faster alternative to [`__cpuid`](cpuid-cpuidex.md) intrinsic to dynamically check for most frequently used CPU features. The `__check_arch_support` intrinsic provides an alternative to [`predefined macros`](..\preprocessor\predefined-macros.md) for compile time code selection based on ISA extensions. -The feature values that can be used in these intrisics are in the table below. These are defined in isa_availability.h +The following feature values can be used in these intrinsics. These values are defined in isa_availability.h. |Feature Value Name|Description| |---------------|------------------| -|`__IA_SUPPORT_VECTOR128`|Vector instructions with lengths up to 128 bits. This is enabled for SSE2 or later extensions| -|`__IA_SUPPORT_VECTOR256`|Vector instructions with lengths up to 256 bits. This is enabled for AVX2 or later extensions| -|`__IA_SUPPORT_VECTOR512`|Vector instructions with lengths up to 512 bits. This is enabled for AVX-512 or later extensions| -|`__IA_SUPPORT_AVX10`|AVX10 support. This is enabled for AVX10.1 or later extensions| +|`__IA_SUPPORT_VECTOR128`|Vector instructions with lengths up to 128 bits. This feature is enabled for SSE2 or later extensions| +|`__IA_SUPPORT_VECTOR256`|Vector instructions with lengths up to 256 bits. This feature is enabled for AVX2 or later extensions| +|`__IA_SUPPORT_VECTOR512`|Vector instructions with lengths up to 512 bits. This feature is enabled for AVX-512 or later extensions| +|`__IA_SUPPORT_AVX10`|AVX10 support. This feature is enabled for AVX10.1 or later extensions| |`__IA_SUPPORT_SSE42`|SSE4.2 support| -|`__IA_SUPPORT_SV128X`|AVX-512 instructions for scalar of 128-bits. Can be used to signal that certain useful AVX-512 instruction like conversions can be used in scalar code| +|`__IA_SUPPORT_SV128X`|AVX-512 instructions for scalar of 128 bits. Can be used to signal that certain useful AVX-512 instruction like conversions can be used in scalar code| |`__IA_SUPPORT_AVX10_2`|AVX10.2 support| |`__IA_SUPPORT_APX`|APX support| |`__IA_SUPPORT_FP16`|Half-precision floating-point instruction support| Multiple feature values can be combined together using the OR(|) operator. -The `__check_arch_support` intrinsic can always be evaluated at compile time, so using it in optimized code adds no additional instructions to execute. +The `__check_arch_support` intrinsic can always be evaluated at compile time, so using it in optimized code adds no extra instructions to execute. +Support for these intrinsics was added in Visual Studio 2022. ## Example -This example uses 256-bit AVX-512 instructions to vectorize conversion of double-precision values in input to 64-bit signed integer values in output. The tail loop for converting any source values not handled by the vector code is also used in case the vector code cannot be executed. Note that the compile-time support is checked before runtime support so that a runtime check can be avoided if possible. +This example uses 256-bit AVX-512 instructions to vectorize conversion of double-precision values in input to 64-bit signed integer values in output. The tail loop for converting any source values not handled by the vector code is also used in case the vector code can't be executed. The compile-time support is checked before runtime support so that a runtime check can be avoided if possible. ```cpp // Compile this test with: /EHsc /O2 From 7c1dfe88209fbb6a707d47e7f96374b06c2df414 Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Wed, 6 Nov 2024 22:18:46 -0800 Subject: [PATCH 3/8] update 1 --- docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md b/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md index c42e3617c6..f0fcca5fb3 100644 --- a/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md +++ b/docs/intrinsics/alphabetical-listing-of-intrinsic-functions.md @@ -7,7 +7,7 @@ ms.assetid: 178f88a2-7e8e-43ac-b55e-ef3298bef895 --- # Alphabetical listing of intrinsic functions -The following sections describe the Microsoft-specific intrinsic functions available on some or all architectures. Other supported intrinsics are documented by processor manufacturers, either in the header files or on their websites. For more information, and links to manufacturer documentation, see these articles: [ARM intrinsics](../intrinsics/arm-intrinsics.md), [ARM64 intrinsics](../intrinsics/arm64-intrinsics.md), [x86 intrinsics](../intrinsics/x86-intrinsics-list.md), and [x64 intrinsics](../intrinsics/x64-amd64-intrinsics-list.md). C Runtime Library (CRT) functions implemented as intrinsics aren't documented here. CRT intrinsic functions are documented in the [C Runtime Library Reference](../c-runtime-library/c-run-time-library-reference.md). +The following sections describe the Microsoft-specific intrinsic functions available on some or all architectures. Processor manufacturers document other supported intrinsics, either in the header files or on their websites. For more information, and links to manufacturer documentation, see these articles: [ARM intrinsics](../intrinsics/arm-intrinsics.md), [ARM64 intrinsics](../intrinsics/arm64-intrinsics.md), [x86 intrinsics](../intrinsics/x86-intrinsics-list.md), and [x64 intrinsics](../intrinsics/x64-amd64-intrinsics-list.md). C Runtime Library (CRT) functions implemented as intrinsics aren't documented here. CRT intrinsic functions are documented in the [C Runtime Library Reference](../c-runtime-library/c-run-time-library-reference.md). [`__addfsbyte`, `__addfsword`, `__addfsdword`](../intrinsics/addfsbyte-addfsword-addfsdword.md) From ff9baaeeb7c399dfa0492bef8a1724e1834fa2d9 Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Thu, 7 Nov 2024 12:16:29 -0800 Subject: [PATCH 4/8] update 2 --- docs/intrinsics/check-isa-arch-support.md | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index 48c57868cb..8583c8abc2 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -1,16 +1,15 @@ --- description: "Learn more about: __check_isa_support, __check_arch_support" title: "__check_isa_support, __check_arch_support" -ms.date: "09/02/2019" +ms.date: "11/07/2024" f1_keywords: ["__check_isa_support", "__check_arch_support"] helpviewer_keywords: ["__check_isa_support intrinsic", "__check_arch_support intrinsic"] -ms.assetid: f8c344d3-91bf-405f-8622-cb0e337a6bdc --- # __check_isa_support, __check_arch_support **Microsoft Specific** -Detects if either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time supports the specified ISA feature and AVX10 version. +Detects if either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time supports the specified ISA feature and AVX10 version. ## Syntax @@ -26,7 +25,7 @@ _Bool __check_arch_support( ); ``` -```C++ +```cpp bool __check_isa_support( unsigned feature, unsigned avx10_version @@ -58,7 +57,7 @@ bool __check_arch_support( |`__check_isa_support`|x86, x64| |`__check_arch_support`|x86, x64| -**Header file** \ +**Header file** `` ## Remarks @@ -78,14 +77,14 @@ The following feature values can be used in these intrinsics. These values are d |`__IA_SUPPORT_APX`|APX support| |`__IA_SUPPORT_FP16`|Half-precision floating-point instruction support| -Multiple feature values can be combined together using the OR(|) operator. +Multiple feature values can be combined using the OR(|) operator. The `__check_arch_support` intrinsic can always be evaluated at compile time, so using it in optimized code adds no extra instructions to execute. -Support for these intrinsics was added in Visual Studio 2022. +Support for these intrinsics was added in Visual Studio 2022 version 17.10. ## Example -This example uses 256-bit AVX-512 instructions to vectorize conversion of double-precision values in input to 64-bit signed integer values in output. The tail loop for converting any source values not handled by the vector code is also used in case the vector code can't be executed. The compile-time support is checked before runtime support so that a runtime check can be avoided if possible. +This example uses 256-bit AVX-512 instructions to vectorize conversion of double-precision values to 64-bit signed integer values. The tail loop for converting any source values not handled by the vector code is also used in case the vector code can't be executed. The compile-time support is checked before runtime support so that a runtime check can be avoided if possible. ```cpp // Compile this test with: /EHsc /O2 From b7cf1ac27850e51462a6d9cad408373e1a8445e0 Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Thu, 7 Nov 2024 12:29:25 -0800 Subject: [PATCH 5/8] update 3 --- docs/intrinsics/check-isa-arch-support.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index 8583c8abc2..893aa7ddfc 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -63,7 +63,7 @@ bool __check_arch_support( The `__check_isa_support` intrinsic provides a faster alternative to [`__cpuid`](cpuid-cpuidex.md) intrinsic to dynamically check for most frequently used CPU features. The `__check_arch_support` intrinsic provides an alternative to [`predefined macros`](..\preprocessor\predefined-macros.md) for compile time code selection based on ISA extensions. -The following feature values can be used in these intrinsics. These values are defined in isa_availability.h. +The following feature values can be used in these intrinsics. These values are defined in `isa_availability.h`. |Feature Value Name|Description| |---------------|------------------| From a8a9b8e58a6b2073d156058bd6841a8135ab91b0 Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Thu, 7 Nov 2024 12:34:17 -0800 Subject: [PATCH 6/8] update 4 --- docs/intrinsics/check-isa-arch-support.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index 893aa7ddfc..b21c88b2dc 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -48,7 +48,7 @@ bool __check_arch_support( ## Return value `__check_isa_support` returns `true` if the `feature` and `avx10_version` are supported on the processor at run time, `false` otherwise. -`__check_arch_support` returns `true` if the `feature` and `avx10_version` are supported on the `/arch` flag passed in at compile time, `false` otherwise. +`__check_arch_support` returns `true` if the `feature` and `avx10_version` are supported by the `/arch` flag passed in at compile time, `false` otherwise. ## Requirements From e713f9f983f2a5d8ecea517a1f1b5ed3a3905a99 Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Thu, 7 Nov 2024 12:38:38 -0800 Subject: [PATCH 7/8] update 5 --- docs/intrinsics/check-isa-arch-support.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index b21c88b2dc..bb0b31ff0b 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -47,8 +47,8 @@ bool __check_arch_support( ## Return value -`__check_isa_support` returns `true` if the `feature` and `avx10_version` are supported on the processor at run time, `false` otherwise. -`__check_arch_support` returns `true` if the `feature` and `avx10_version` are supported by the `/arch` flag passed in at compile time, `false` otherwise. +`__check_isa_support` returns `true` if the processor supports `feature` and `avx10_version` at run time, `false` otherwise. +`__check_arch_support` returns `true` if the `/arch` flag supports `feature` and `avx10_version` at compile time, `false` otherwise. ## Requirements From 1da85605b659bf188adbedd1462889e252f3da6f Mon Sep 17 00:00:00 2001 From: Gautham Beeraka Date: Thu, 7 Nov 2024 15:32:47 -0800 Subject: [PATCH 8/8] update 6 --- docs/intrinsics/check-isa-arch-support.md | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/docs/intrinsics/check-isa-arch-support.md b/docs/intrinsics/check-isa-arch-support.md index bb0b31ff0b..00b066b54b 100644 --- a/docs/intrinsics/check-isa-arch-support.md +++ b/docs/intrinsics/check-isa-arch-support.md @@ -9,7 +9,8 @@ helpviewer_keywords: ["__check_isa_support intrinsic", "__check_arch_support int **Microsoft Specific** -Detects if either the processor at run time or the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) at compile time supports the specified ISA feature and AVX10 version. +`__check_isa_support` - detects if the processor supports the specified ISA feature and AVX10 version at run time. +`__check_arch_support` - detects if the arch flag (see [`/arch` (x86)](..\build\reference\arch-x86.md), [`/arch` (x64)](..\build\reference\arch-x64.md)) supports the specified ISA feature and AVX10 version at compile time. ## Syntax @@ -40,10 +41,10 @@ bool __check_arch_support( ### Parameters *feature*\ -[in] ISA feature to be checked. +[in] ISA feature to check. *avx10_version*\ -[in] AVX10 version to be checked. Should be 0 if AVX10 version check isn't required. +[in] AVX10 version to check. 0 if AVX10 version check isn't required. ## Return value @@ -61,7 +62,7 @@ bool __check_arch_support( ## Remarks -The `__check_isa_support` intrinsic provides a faster alternative to [`__cpuid`](cpuid-cpuidex.md) intrinsic to dynamically check for most frequently used CPU features. The `__check_arch_support` intrinsic provides an alternative to [`predefined macros`](..\preprocessor\predefined-macros.md) for compile time code selection based on ISA extensions. +The `__check_isa_support` intrinsic provides a faster alternative to the [`__cpuid`](cpuid-cpuidex.md) intrinsic to dynamically check for most frequently used CPU features. The `__check_arch_support` intrinsic provides an alternative to the [`predefined macros`](..\preprocessor\predefined-macros.md) for compile time code selection based on ISA extensions. The following feature values can be used in these intrinsics. These values are defined in `isa_availability.h`.