Suppress MISRA C rule 11.3 in MISRA.md (#857)

chinglee-iot · web-flow · commit dabbc05a3997 · 2023-11-28T19:04:29.000+05:30
Suppress MISRA C rule 11.3 in MISRA.md
diff --git a/MISRA.md b/MISRA.md
@@ -31,6 +31,25 @@ _Ref 8.4.1_
         a declaration in header file is not useful as the assembly code will
         still need to declare it separately.
 
+
+#### Rule 11.3
+
+_Ref 11.3.1_
+
+- MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
+        object type and a pointer to a different object type.
+        This rule prohibits casting a pointer to object into a pointer to a
+        different object because it may result in an incorrectly aligned pointer,
+        leading to undefined behavior. Even if the casting produces a correctly
+        aligned pointer, the behavior may be still undefined if the pointer is
+        used to access an object. FreeRTOS deliberately creates external aliases
+        for all the kernel object types (StaticEventGroup_t, StaticQueue_t,
+        StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding
+        purposes. The internal object types and the corresponding external
+        aliases are guaranteed to have the same size and alignment which is
+        checked using configASSERT.
+
+
 ### MISRA configuration
 
 Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
@@ -69,4 +88,4 @@ Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
         }
     ]
 }
-```
+```
diff --git a/event_groups.c b/event_groups.c
@@ -98,7 +98,10 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,
         #endif /* configASSERT_DEFINED */
 
         /* The user has provided a statically allocated event group - use it. */
-        pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
+        /* MISRA Ref 11.3.1 [Misaligned access] */
+        /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+        /* coverity[misra_c_2012_rule_11_3_violation] */
+        pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer;
 
         if( pxEventBits != NULL )
         {
@@ -710,6 +713,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )
             /* Check if the event group was statically allocated. */
             if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdTRUE )
             {
+                /* MISRA Ref 11.3.1 [Misaligned access] */
+                /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+                /* coverity[misra_c_2012_rule_11_3_violation] */
                 *ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
                 xReturn = pdTRUE;
             }
@@ -721,6 +727,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )
         #else /* configSUPPORT_DYNAMIC_ALLOCATION */
         {
             /* Event group must have been statically allocated. */
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
             *ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
             xReturn = pdTRUE;
         }
diff --git a/queue.c b/queue.c
@@ -408,7 +408,10 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
             /* The address of a statically allocated queue was passed in, use it.
              * The address of a statically allocated storage area was also passed in
              * but is already set. */
-            pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
+            pxNewQueue = ( Queue_t * ) pxStaticQueue;
 
             #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
             {
@@ -459,6 +462,9 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,
                     *ppucQueueStorage = ( uint8_t * ) pxQueue->pcHead;
                 }
 
+                /* MISRA Ref 11.3.1 [Misaligned access] */
+                /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+                /* coverity[misra_c_2012_rule_11_3_violation] */
                 *ppxStaticQueue = ( StaticQueue_t * ) pxQueue;
                 xReturn = pdTRUE;
             }
diff --git a/stream_buffer.c b/stream_buffer.c
@@ -406,7 +406,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
                                                            StreamBufferCallbackFunction_t pxSendCompletedCallback,
                                                            StreamBufferCallbackFunction_t pxReceiveCompletedCallback )
     {
-        StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
+        /* MISRA Ref 11.3.1 [Misaligned access] */
+        /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+        /* coverity[misra_c_2012_rule_11_3_violation] */
+        StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer;
         StreamBufferHandle_t xReturn;
         uint8_t ucFlags;
 
@@ -466,7 +469,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
 
             traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
 
-            xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
+            xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer;
         }
         else
         {
@@ -498,6 +504,9 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
         if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) != ( uint8_t ) 0 )
         {
             *ppucStreamBufferStorageArea = pxStreamBuffer->pucBuffer;
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
             *ppxStaticStreamBuffer = ( StaticStreamBuffer_t * ) pxStreamBuffer;
             xReturn = pdTRUE;
         }
diff --git a/tasks.c b/tasks.c
@@ -1271,7 +1271,10 @@ static void prvAddNewTaskToReadyList( TCB_t * pxNewTCB ) PRIVILEGED_FUNCTION;
         {
             /* The memory used for the task's TCB and stack are passed into this
              * function - use them. */
-            pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
+            pxNewTCB = ( TCB_t * ) pxTaskBuffer;
             ( void ) memset( ( void * ) pxNewTCB, 0x00, sizeof( TCB_t ) );
             pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 
@@ -4354,6 +4357,9 @@ char * pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char
             if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB )
             {
                 *ppuxStackBuffer = pxTCB->pxStack;
+                /* MISRA Ref 11.3.1 [Misaligned access] */
+                /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+                /* coverity[misra_c_2012_rule_11_3_violation] */
                 *ppxTaskBuffer = ( StaticTask_t * ) pxTCB;
                 xReturn = pdTRUE;
             }
diff --git a/timers.c b/timers.c
@@ -394,7 +394,10 @@
 
             /* A pointer to a StaticTimer_t structure MUST be provided, use it. */
             configASSERT( pxTimerBuffer );
-            pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
+            /* MISRA Ref 11.3.1 [Misaligned access] */
+            /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+            /* coverity[misra_c_2012_rule_11_3_violation] */
+            pxNewTimer = ( Timer_t * ) pxTimerBuffer;
 
             if( pxNewTimer != NULL )
             {
@@ -664,6 +667,9 @@
 
             if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) != 0U )
             {
+                /* MISRA Ref 11.3.1 [Misaligned access] */
+                /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+                /* coverity[misra_c_2012_rule_11_3_violation] */
                 *ppxTimerBuffer = ( StaticTimer_t * ) pxTimer;
                 xReturn = pdTRUE;
             }

Original file line number	Diff line number	Diff line change
`@@ -98,7 +98,10 @@ static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits,`
`98`	`98`	`#endif /* configASSERT_DEFINED */`
`99`	`99`
`100`	`100`	`/* The user has provided a statically allocated event group - use it. */`
`101`		`- pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). /`
	`101`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`102`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`103`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
	`104`	`+ pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer;`
`102`	`105`
`103`	`106`	`if( pxEventBits != NULL )`
`104`	`107`	`{`
`@@ -710,6 +713,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )`
`710`	`713`	`/* Check if the event group was statically allocated. */`
`711`	`714`	`if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdTRUE )`
`712`	`715`	`{`
	`716`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`717`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`718`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
`713`	`719`	`ppxEventGroupBuffer = ( StaticEventGroup_t ) pxEventBits;`
`714`	`720`	`xReturn = pdTRUE;`
`715`	`721`	`}`
`@@ -721,6 +727,9 @@ void vEventGroupDelete( EventGroupHandle_t xEventGroup )`
`721`	`727`	`#else /* configSUPPORT_DYNAMIC_ALLOCATION */`
`722`	`728`	`{`
`723`	`729`	`/* Event group must have been statically allocated. */`
	`730`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`731`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`732`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
`724`	`733`	`ppxEventGroupBuffer = ( StaticEventGroup_t ) pxEventBits;`
`725`	`734`	`xReturn = pdTRUE;`
`726`	`735`	`}`
Original file line number	Diff line number	Diff line change
`@@ -408,7 +408,10 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,`
`408`	`408`	`/* The address of a statically allocated queue was passed in, use it.`
`409`	`409`	`* The address of a statically allocated storage area was also passed in`
`410`	`410`	`* but is already set. */`
`411`		`- pxNewQueue = ( Queue_t * ) pxStaticQueue; /lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. /`
	`411`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`412`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`413`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
	`414`	`+ pxNewQueue = ( Queue_t * ) pxStaticQueue;`
`412`	`415`
`413`	`416`	`#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )`
`414`	`417`	`{`
`@@ -459,6 +462,9 @@ BaseType_t xQueueGenericReset( QueueHandle_t xQueue,`
`459`	`462`	`ppucQueueStorage = ( uint8_t ) pxQueue->pcHead;`
`460`	`463`	`}`
`461`	`464`
	`465`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`466`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`467`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
`462`	`468`	`ppxStaticQueue = ( StaticQueue_t ) pxQueue;`
`463`	`469`	`xReturn = pdTRUE;`
`464`	`470`	`}`
Original file line number	Diff line number	Diff line change
`@@ -406,7 +406,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,`
`406`	`406`	`StreamBufferCallbackFunction_t pxSendCompletedCallback,`
`407`	`407`	`StreamBufferCallbackFunction_t pxReceiveCompletedCallback )`
`408`	`408`	`{`
`409`		`- StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. /`
	`409`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`410`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`411`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
	`412`	`+ StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer;`
`410`	`413`	`StreamBufferHandle_t xReturn;`
`411`	`414`	`uint8_t ucFlags;`
`412`	`415`
`@@ -466,7 +469,10 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,`
`466`	`469`
`467`	`470`	`traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );`
`468`	`471`
`469`		`- xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /lint !e9087 Data hiding requires cast to opaque type. /`
	`472`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`473`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`474`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
	`475`	`+ xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer;`
`470`	`476`	`}`
`471`	`477`	`else`
`472`	`478`	`{`
`@@ -498,6 +504,9 @@ static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,`
`498`	`504`	`if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) != ( uint8_t ) 0 )`
`499`	`505`	`{`
`500`	`506`	`*ppucStreamBufferStorageArea = pxStreamBuffer->pucBuffer;`
	`507`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`508`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`509`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
`501`	`510`	`ppxStaticStreamBuffer = ( StaticStreamBuffer_t ) pxStreamBuffer;`
`502`	`511`	`xReturn = pdTRUE;`
`503`	`512`	`}`
Original file line number	Diff line number	Diff line change
`@@ -394,7 +394,10 @@`
`394`	`394`
`395`	`395`	`/* A pointer to a StaticTimer_t structure MUST be provided, use it. */`
`396`	`396`	`configASSERT( pxTimerBuffer );`
`397`		`- pxNewTimer = ( Timer_t * ) pxTimerBuffer; /lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. /`
	`397`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`398`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`399`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
	`400`	`+ pxNewTimer = ( Timer_t * ) pxTimerBuffer;`
`398`	`401`
`399`	`402`	`if( pxNewTimer != NULL )`
`400`	`403`	`{`
`@@ -664,6 +667,9 @@`
`664`	`667`
`665`	`668`	`if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) != 0U )`
`666`	`669`	`{`
	`670`	`+ /* MISRA Ref 11.3.1 [Misaligned access] */`
	`671`	`+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */`
	`672`	`+ /* coverity[misra_c_2012_rule_11_3_violation] */`
`667`	`673`	`ppxTimerBuffer = ( StaticTimer_t ) pxTimer;`
`668`	`674`	`xReturn = pdTRUE;`
`669`	`675`	`}`