@@ -299,11 +299,11 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
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G_USUBSAT, G_SSUBSAT, G_USHLSAT, G_SSHLSAT, G_FPOWI})
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.lower ();
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- getActionDefinitionsBuilder ({G_CTTZ, G_CTTZ_ZERO_UNDEF, G_CTLZ_ZERO_UNDEF})
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+ getActionDefinitionsBuilder ({G_CTTZ_ZERO_UNDEF, G_CTLZ_ZERO_UNDEF})
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.lowerForCartesianProduct ({s8}, LegalLibcallScalars)
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.clampScalar (0 , s8, s8);
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- getActionDefinitionsBuilder (G_CTLZ)
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+ getActionDefinitionsBuilder ({ G_CTLZ, G_CTTZ} )
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.customForCartesianProduct ({s8}, LegalLibcallScalars)
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.clampScalar (0 , s8, s8);
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@@ -374,7 +374,8 @@ LegalizerHelper::LegalizeResult Z80LegalizerInfo::legalizeCustomMaybeLegal(
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case G_FCANONICALIZE:
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return legalizeFCanonicalize (Helper, MI);
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case G_CTLZ:
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- return legalizeCtlz (Helper, MI);
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+ case G_CTTZ:
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+ return legalizeCtz (Helper, MI);
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case G_MEMCPY:
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case G_MEMCPY_INLINE:
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case G_MEMMOVE:
@@ -892,9 +893,9 @@ Z80LegalizerInfo::legalizeFCanonicalize(LegalizerHelper &Helper,
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}
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LegalizerHelper::LegalizeResult
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- Z80LegalizerInfo::legalizeCtlz (LegalizerHelper &Helper,
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- MachineInstr &MI) const {
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- assert (MI.getOpcode () == G_CTLZ);
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+ Z80LegalizerInfo::legalizeCtz (LegalizerHelper &Helper,
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+ MachineInstr &MI) const {
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+ assert (MI.getOpcode () == G_CTLZ || MI. getOpcode () == G_CTTZ );
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MachineIRBuilder &MIRBuilder = Helper.MIRBuilder ;
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MachineRegisterInfo &MRI = *MIRBuilder.getMRI ();
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auto &Ctx = MIRBuilder.getMF ().getFunction ().getContext ();
@@ -910,14 +911,15 @@ Z80LegalizerInfo::legalizeCtlz(LegalizerHelper &Helper,
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return LegalizerHelper::UnableToLegalize;
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RTLIB::Libcall Libcall;
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+ bool Leading = MI.getOpcode () == G_CTLZ;
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switch (SrcSize) {
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default : return LegalizerHelper::UnableToLegalize;
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- case 8 : Libcall = RTLIB::CTLZ_I8 ; break ;
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- case 16 : Libcall = RTLIB::CTLZ_I16; break ;
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- case 24 : Libcall = RTLIB::CTLZ_I24; break ;
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- case 32 : Libcall = RTLIB::CTLZ_I32; break ;
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- case 48 : Libcall = RTLIB::CTLZ_I48; break ;
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- case 64 : Libcall = RTLIB::CTLZ_I64; break ;
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+ case 8 : Libcall = Leading ? RTLIB::CTLZ_I8 : RTLIB::CTTZ_I8; break ;
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+ case 16 : Libcall = Leading ? RTLIB::CTLZ_I16 : RTLIB::CTTZ_I16 ; break ;
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+ case 24 : Libcall = Leading ? RTLIB::CTLZ_I24 : RTLIB::CTTZ_I24 ; break ;
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+ case 32 : Libcall = Leading ? RTLIB::CTLZ_I32 : RTLIB::CTTZ_I32 ; break ;
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+ case 48 : Libcall = Leading ? RTLIB::CTLZ_I48 : RTLIB::CTTZ_I48 ; break ;
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+ case 64 : Libcall = Leading ? RTLIB::CTLZ_I64 : RTLIB::CTTZ_I64 ; break ;
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}
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auto Result = createLibcall (MIRBuilder, Libcall,
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{DstReg, IntegerType::get (Ctx, DstSize), 0 },
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