soc/xtensa/dc233c: Link iram/iram0 sections generically

The linkage for the "after vector" RAM region was specifying files
explicitly, which breaks when other files (or new files) want to add
code to these regions.  In particular call0 needs to use iram to store
local jump targets for the vector entry.

There's really no good spec on this.  Conventionally xtensa platforms
have always put the .iram and iram0 sections (and their derived
sections like literals) immediately after the vector table, but I
doubt there's a promise to that extent anywhere.

Just try to adhere to what convention there is.

(I note there's also a ".iram1" section referenced here that I'm not
moving because I don't know what's in it)

Signed-off-by: Andy Ross <[email protected]>

Author: andyross

soc/xtensa/dc233c/include/xtensa-dc233c.ld

@@ -300,13 +300,10 @@ SECTIONS
      *       conflict with auto-refill TLB resulting in
      *       TLB multi-hit exception.
      */
+    *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text)
 
     *libarch__xtensa__core.a:xtensa-asm2-util.S.obj(.literal)
     *libarch__xtensa__core.a:xtensa-asm2-util.S.obj(.text)
-    *libarch__xtensa__core.a:xtensa-asm2-util.S.obj(.iram.text)
-    *libarch__xtensa__core.a:xtensa-asm2-util.S.obj(.iram0.text)
-
-    *libarch__xtensa__core.a:window_vectors.S.obj(.iram.text)
 
     *libarch__xtensa__core.a:xtensa-asm2.c.obj(.literal.*)
     *libarch__xtensa__core.a:xtensa-asm2.c.obj(.text.*)