diff --git a/source/load-ivy.sc b/source/load-ivy.sc
index 1669177..8806df2 100644
--- a/source/load-ivy.sc
+++ b/source/load-ivy.sc
@@ -10,13 +10,15 @@ interp.configureCompiler(x => x.settings.source.value = scala.tools.nsc.settings
 // System.setProperty("https.proxyHost", "proxy.example.com")
 // System.setProperty("https.proxyPort", "3128")
 
-import $ivy.`edu.berkeley.cs::chisel3:3.2.0` 
-import $ivy.`edu.berkeley.cs::chisel-iotesters:1.3.0`
-import $ivy.`edu.berkeley.cs::chisel-testers2:0.1.0`
-import $ivy.`edu.berkeley.cs::dsptools:1.2.0`
+import $ivy.`edu.berkeley.cs::chisel3:3.4-SNAPSHOT`
+import $ivy.`edu.berkeley.cs::chisel-iotesters:1.5-SNAPSHOT`
+import $ivy.`edu.berkeley.cs::chiseltest:0.3-SNAPSHOT`
+import $ivy.`edu.berkeley.cs::dsptools:1.4-SNAPSHOT`
 import $ivy.`org.scalanlp::breeze:0.13.2`
 import $ivy.`edu.berkeley.cs::rocket-dsptools:1.2.0`
-import $ivy.`edu.berkeley.cs::firrtl-diagrammer:1.1.0`
+import $ivy.`edu.berkeley.cs::firrtl-diagrammer:1.3-SNAPSHOT`
+
+import $ivy.`org.scalatest::scalatest:3.2.2`
 
 // Convenience function to invoke Chisel and grab emitted Verilog.
 def getVerilog(dut: => chisel3.core.UserModule): String = {
@@ -106,12 +108,12 @@ def generateVisualizations(gen: () => chisel3.RawModule): (String, String) = {
     import chisel3.experimental._
     import firrtl.ir.Module
     import sys.process._
-    
+
     val targetDir = "build"
     val chiselIR = chisel3.Driver.elaborate(gen)
     val firrtlIR = chisel3.Driver.emit(chiselIR)
     val config = Config(targetDir = "build", firrtlSource = firrtlIR)
-  
+
     val sourceFirrtl = {
       if(config.firrtlSource.nonEmpty) {
         config.firrtlSource
@@ -129,14 +131,14 @@ def generateVisualizations(gen: () => chisel3.RawModule): (String, String) = {
       case other => other
     }
     val newTop = readableTop
-    
+
     val newModules: Seq[firrtl.ir.DefModule] = ast.modules.map {
         case m: Module if m.name == ast.main => m.copy(name = newTop)
         case other => other
     }
-    
+
     val newAst = ast.copy(main = newTop, modules = newModules)
-    
+
     val controlAnnotations: Seq[Annotation] = config.toAnnotations
 
     val loweredAst = ToLoFirrtl.lower(newAst)
@@ -158,10 +160,10 @@ def generateVisualizations(gen: () => chisel3.RawModule): (String, String) = {
     s"cp build/${readableTop}.dot.svg build/${uniqueTop}.dot.svg"!!
 
     s"cp build/${readableTop}_hierarchy.dot.svg build/${uniqueTop}_hierarchy.dot.svg"!!
-    
+
     val moduleView = targetDir + "/" + uniqueTop + ".dot.svg"
     val x = """<a name="top"></a><img src=" """ + moduleView + """" alt="Module View";" />"""
-    
+
     val instanceView = targetDir + "/" + uniqueTop + "_hierarchy.dot.svg"
     val y = """<a name="top"></a><img src=" """ + instanceView + """" alt="Hierarchy View" style="width:480px;" />"""
     (x, y)